If I understand the user guide correctly, it would appear that we can set PLL5 (Video PLL) to Bypass mode and have it listen to external clock CLK_N/CLK_P instead. While I understand we can use a VSYNC with the eLCDIF VSYNC mode, we want to actually synchronize the pixel clock as well which there is no input I can see for that, unless I am mistaken.
Does this sound correct?
Hi Rick
yes this is correct, PLL can be bypassed and use external clock CLK_N/CLK_P
instead. There is no option in eLCDIF module for exaternal pixel clock.
Best regards
igor
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