could you explain each of CSI clocks?

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could you explain each of CSI clocks?

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shinichiichimur
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Hello everyone! I'm embedding i.MX6 in my apprication which uses a camera, so I'm trying to research about CSI interface. CSI use csi_hclk, ipg_clk, ipg_clk_s, and ipg_clk_s_raw clock; they are from AHB_CLK_ROOT and IPG_CLK_ROOT, IMX6SLRM Reference manual says that they are Module clock, Peripheral clock, Peripheral access clock, and  Peripheral  raw data clock, but the manual doesn't tell enouth description about them. Which clock is the sampling clock of pixcel data? how fast should i set each clock for my camera?; my camera emits 75.4MHz data clock.

Thank you for reading this.

Regards,

Ichimura Shinichi

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Excerpt from "i.MX 6SoloLite Applications Processor Reference Manual", p483

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art
NXP Employee
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Q. Which clock is the sampling clock of pixcel data?

A. This is CSI_PIXCLK, it is provided externally by a camera.

Q. how fast should i set each clock for my camera?

A. The AHB_CLK_ROOT and IPG_CLK_ROOT should be at their default values.

Q. my camera emits 75.4MHz data clock.

A. As per the i.MX6SL Data Sheet, the maximum allowed frequency of CSI_PIXCLK is 66MHz. So, it seems that the i.MX6SL processor cannot support your camera.


Have a great day,
Artur

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art
NXP Employee
NXP Employee

Q. Which clock is the sampling clock of pixcel data?

A. This is CSI_PIXCLK, it is provided externally by a camera.

Q. how fast should i set each clock for my camera?

A. The AHB_CLK_ROOT and IPG_CLK_ROOT should be at their default values.

Q. my camera emits 75.4MHz data clock.

A. As per the i.MX6SL Data Sheet, the maximum allowed frequency of CSI_PIXCLK is 66MHz. So, it seems that the i.MX6SL processor cannot support your camera.


Have a great day,
Artur

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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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