Hello,Community
I was able to find a description of the state where the reset was released.
Please tell me the VDD_ARM voltage and VDD_SOC voltage that is reset or reset is released.
Excerpt from section 6.2.5 of i.MX 7Dual Applications Processor Reference Manual
• 4ms after the external power supply VDDHIGH_IN is valid
• 1ms after the VDD_SOC_CAP supply is valid
best regards
Goto
Solved! Go to Solution.
Hello,
Table 9 (Operating ranges) of the Datasheet(s) may be used for minimal allowed voltage
values:
VDD_ARM - 0.95 V
VDD_SOC - 0.95 V
https://www.nxp.com/docs/en/data-sheet/IMX7DCEC.pdf
Regards,
Yuri.
Hello,
Table 9 (Operating ranges) of the Datasheet(s) may be used for minimal allowed voltage
values:
VDD_ARM - 0.95 V
VDD_SOC - 0.95 V
https://www.nxp.com/docs/en/data-sheet/IMX7DCEC.pdf
Regards,
Yuri.