Why the LPDDR4 channel connection interchanged with i.MX8M Mini in the reference design?

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Why the LPDDR4 channel connection interchanged with i.MX8M Mini in the reference design?

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m_c
Senior Contributor I

In data sheet, DRAM_AC04 <-> CK_t_A and DRAM_AC24 <-> CK_t_B, but in the reference design,  DRAM_AC04 <-> CK_t_B and DRAM_AC24 <-> CK_t_A?

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art
NXP Employee
NXP Employee

In the i.MX8MMini EVK design, the LPDDR4 channels _A and _B are completely swapped with regard to the LPDDR4 chip. This is done for the PCB routing convenience.

Best Regards,

Artur

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art
NXP Employee
NXP Employee

In the i.MX8MMini EVK design, the LPDDR4 channels _A and _B are completely swapped with regard to the LPDDR4 chip. This is done for the PCB routing convenience.

Best Regards,

Artur

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siegfried_buerger
Contributor II

I am not really sure, but I´ve noticed:

If you do not connect the pins as in the reference design, there will be crossings at the end, in the routing.

So i think it´s just because it´s better for the layout.