What is the boot sequence for imx rt1172 microcontroller?

[Shiva-2022]

Hello,

I am looking for a exact boot sequence for a imx rt1172 microcontroller. 
we have board with NAND external flash. During boot process who does copying of data from NAND flash to RAM ? 

Please provide your inputs. 

thank you. 

[Shiva-2022]

Thanks you so much for quick reply. 

I tried to find the Imx rt1172 reference manual but I got Imx rt1170 reference manual. 

Can you please share me the link for Imx rt1172 reference manual? Please. 

How BootRom get to start address and size of the application? To copy into RAM? Is the RAM copy location is fixed? How do I change RAM location if required.

Thanks in advance:)

[jay_heng]

i.MXRT1170 RM is common for all i.MXRT117x chips, RT1170 is the family name.

There are necessary boot headers along with your application data, all these data will be flashed into NAND. one of the boot header is IVT, app start address and length info are stored in IVT. BootROM reads IVT to know application info. so you can link application into anywhere of RAM.

[Shiva-2022]

Thank you. Got the point now. 

I am curious about the boot header, do we have any documents for better understanding of boot header ?

I wanted to link my application with proper boot header details so that my application can start running smoothly. 

Please provide more information related to boot header it helps for me to prepare final build so that I can flash and test. 

Thanks in advance

[jay_heng]

Below two blogs may be helpful to you (it is in chinese)

Bootable image格式与加载(elftosb/.bd)

从Raw NAND启动

We need tool to generate all necessary boot headers, not to provide them manually.

[Shiva-2022]

Hello jay_heng,

Thanks for the inputs.
Understood the boot flow now.

We have started working on IMX1170XEVK board and we curious to verify non-XIP execution using NOR.

We didn't understood the exact meaning of below sentence from the IMX1170X reference manual page no:286.
"Both booting an XIP and non XIP image are supported from Serial NOR Flash. For XIP
boot, the image has to be built for FlexSPI address space; and for non XIP, the image can
be built to execute from internal RAM.
".

Can you please elaborate what it means exactly ?

[jeremyzhou]

Hi,
As @jay_heng mentioned before, for the XIP image, the application is stored in the Nor Serial flash whose address map is consistent with the link address, however, for the Non-XIP image, the link address usually is the internal RAM, so the ROM code needs to copy the application to the target address prior to jumping to run, just like the below figure shows.

Have a great day,
TIC

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[djarin]

Hi, from your figure, in stage 4, what happen if the application size is larger than ITCM?
I am using imxrt1064, and factory default ITCM size is 128K, and we not intent to increase this size, and we have large enough SDRAM, can we modify stage 4 so that the application will load into SDRAM?

[jay_heng]

Yes, we can store Both XIP and Non-XIP image in NOR flash, these two kinds of image can be booted by ROM.

For XIP image (it is linked from 0x30000000/0x60000000), BootROM jumps into it directly.

For Non-XIP image (it is linked from 0x0/0x20000000/0x20200000), BootROM copies it from Flash to dest address then jumps into it.

[Shiva-2022]

Hello jay_heng,

Thanks for your reply.

Here is the actual doubt we have.

As per understanding ROM will read the BOOT_DATA structure and from there it  gets the target address and size. so it will copy the data from NOR flash to specified address in BOOT_DATA target address. 

Is above understanding correct ?

Currently in the attached image the target address and size details in BOOT_DATA structure is NOR flash address (addres: 0x30000000 and size: 0x1000000) so its executing from the NOR flash.

as workaround if we modify the target address and size manually with RAM address does it makes sense ?

Please suggest.

[jeremyzhou]

Hi @Shiva-2022 ，
Thanks for your reply.
1) Is above understanding correct ?
-- Yes.
2）As workaround if we modify the target address and size manually with RAM address does it makes sense?
--  After modify the linker address, it needs to rebuild the project demo to generate a new image.
Have a great day,
TIC

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[Shiva-2022]

Hello jeremyzhou,

I have modified the linker and rebuilt the compilation was successful.

after flashing its going to Exception.

Can you please give more details how exactly this copying from flash to RAM happens, what and parameters boot ROM checks for successful loading the data to RAM.

Thank you.

Have a good day!

[jeremyzhou]

Hi @Shiva-2022 ,
Thanks for your reply.
Before sharing some advice, I was wondering if you can illustrate the steps you did, further, you can refer to the link.
Have a great day,
TIC

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[Shiva-2022]

Hello jeremyzhou,

Here are the steps followed:

- Enabled the Plain load image and build the project.

- Took a copy of the generated linker file.

- Disabled the manage linker option and Plain load image.

- Re-arranged the linker which was generated earlier.

- Re-built the project after linker changes.

- Once after flashed control came to resetISR but when calling main() its going to Exception (either Usage fault or Harda fault).

Please suggest your inputs.

Thank you.

[jeremyzhou]

Hi,
Sorry for replying late because of the National Holiday, I'd highly recommend you refer to the link to generate the image which should be executed in the RAM, further, you can learn the loading process of the bootable image via the post too.
Have a great day,
TIC

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[Shiva-2022]

Hello jeremyzhou,

Thanks for the inputs.
Serial NOR flash to RAM is working fine now.

Bets Regards,
Shiva

[Shiva-2022]

Hello,

Thank you for your reply. 

I will check if any query, will come back to you. 

[jay_heng]

Please refer to System Boot chapter in i.MXRT1172 reference manual.

There is on-chip BootROM, BootROM does copying of application data from NAND flash to RAM.