Hello,
I am using the IMX6ULL and was curious if anyone else has observed this scenario?...
1. Attach Segger JLink Plus to IMX6ULL JTAG interface
2. Power up IMX6ULL
3. Allow 1st stage program loading efforts to stream u-Boot from SPI NOR into DDR (or other start-up media if not using SPI NOR)
4. Allow IMX6ULL to begin executing the existing SPI NOR originated u-boot from DDR (or other start-up media if not using SPI NOR)
5. Use JLinkExe to issue 'h' - halt command
6. Use JLinkExe command 'loadbin' with a new u-boot.bin image beginning from the 1st u-boot.bin instruction address through the end of the new u-boot image
7. Use JLinkExe to issue 'setPC' - set Program Counter command to set the program counter to the 1st instruction in the new u-boot.bin file, which was loaded via JTAG.
8. Use JlinkExe to issue 'g' - Go command
9. Monitor IMX6ULL debug UART traffic to observe the execution response of u-boot
....what I'm seeing is -> the u-boot 'ver' command hints that the actual u-boot version being run following the above sequence is the older u-boot image. So... to me it hints the target is re-running 1st stage program loading efforts and re-streaming the old u-boot.bin image into DDR after step '8.' in the sequence above.
And... if this theory is correct - >1st stage program loading is re-run after step '8.' above?... Is there a way to sequence IMX6ULL execution control such that a new u-boot.bin image can be streamed into DDR over JTAG without subsequently watching it get blown away by a re-execution of 1st stage program re-re-loading efforts?
Thanks much in advance!
Regards,
--DJ Regan
