UBOOT For custom board

[kotteeswarangs]

Hi,

We have custom board based on SabreLite Board.

We have built the uboot based on 2009.8 version.

As far as DDR concern both board are same, so DCD settings will be fine.

I built the image and loaded using manufacturing tool (imx_usb), but I don't see any serial port messages..

But samething works fine in sabrelite board..

I don't know whom to suspect it is ddr or serial port ..

Any pointers?

[YixingKong]

Kotttee

We have not got your response yet and will close the discussion in 3 days. If you still need help, please feel free to reply with an update to this discussion.

Thanks,

Yixing

[YixingKong]

Kotttee

Had your issue got resolved? If yes, we are going to close the discussion in 3 days. If you still need help, please feel free to reply with an update to this discussion.

Thanks,

Yixing

[BiyongSUN]

Hi Kotteeswaran,

Suppose you mentioned imx6

Please follow the design flow:

Once you have made a board, please run the DDR stress test first.

And we have aid for generate the stress test script.

please check the following link.

Hardware check list:

https://community.freescale.com/docs/DOC-93819

i.MX6 DDR Stress Test Tool:

https://community.freescale.com/docs/DOC-96412

i.Mx6DQSDL DDR3 Script Aid:

https://community.freescale.com/docs/DOC-94917

i.Mx6SL LPDDR2 Script Aid:

https://community.freescale.com/docs/DOC-94987

i.Mx6DQSDL LPDDR2 Script Aid:

https://community.freescale.com/docs/DOC-95089

Note:

Please comment the following line below disable watchdog  from the aid sheet.

//init script for i.Mx6Q DDR3  

//=============================================================================  

// Revision History  

// v01  

//=============================================================================  

wait = on  

//=============================================================================  

// Disable WDOG 

//=============================================================================  

//setmem /16 0x020bc000 = 0x30

//=============================================================================  

// Enable all clocks (they are disabled by ROM code)  

[kotteeswarangs]

Hi,

I am using iMX6 ..

The DDR stress test is fine upto 600 MHz , after that it is failing. I have calibration data, but I dont know where to use?

Whatt data "flash_header.s" file has ..is this calibration data?

How can I verify my flash_header.s(board/freescale/mx6q_sabrelite) data is correct for my board.

Thanks,

Regards,

Kotteeswaran G S

[kotteeswarangs]

Hi,

I have generated a file from the excel sheet for my configuration.

I would like to know,,is this file is input to my flash_header.s

How can I verify my flash_header.s(board/freescale/mx6q_sabrelite) data is correct for my board.

Could anybody upload flash_header.s for my configuration 4*256MB , 64 bit.

Thanks,

Regards,

Kotteeswaran G S

[BiyongSUN]

If you have oscilloscope, you will see the result.

Also you can see someting when you are running the stress test tool.

BTW,

Do you get the result then write back to the stress test script(.inc).

Then do it again with the new script, then you get the result then you write back again .......

Till the result has almost no changes.

[kotteeswarangs]

Hi,

What I can see in oscilloscope..what to test in it?

Also I got inc file, what to do with that?

I have built the UBOOT for internal RAM and loaded using Manufacturing Tool.

It worked fine I could see Serial port enabled , messages are printing it out.

Now I have to see External RAM configuration and try it on. I am using flash_header.s from (board/freescale/mx6q_sabrelite)

My configuration 4*256 MB and 64 bit.My board RAM design is based on Sabre Lite board.

Is there any changes I need to do in default flash_header.S file.

Thanks,

Regards,

Kotteeswaran G S

[BiyongSUN]

Please check the tips(Biyong Sun Mar 13, 2014 11:08 PM (in response to Kotteeswaran G S)).

The excel aid file is to generate the inc for ddr stress test tool.

Then, you use the ddr stress tool to the calibration.

the steps like this.

get the vaule from stress test tool. write back to the inc

test again, get vaule, test again..... till almost no changes.

Then, write the final value to the  flash_header.s.

Note: stress test tool needs put the chip into usb otg serail download mode.

[kotteeswarangs]

Hi,

Please note that , whatever the steps you have mentioned I followed it.

I have generated inc file loaded values with flash_header.s.

I could write to DDR using uboot(internal RAM),so ddr write works fine.

My question is by default external ram(0x27800000) is not giving any output in serial port..I am loading the image using Manufacturing tool (imx_usb)

What could be the problem..only flash_header.s or is there anything else?

Thanks,

Regards,

Kotteeswaran G S

[BiyongSUN]

The stress test tool can not run in the externe ram. It must stay in iram and fine tune the external ram.

Some similar code is in the arch\arm\mach-mx6\mx6_mmdc.c

int init_mmdc_settings(void)

/* Allocate IRAM for the DDR freq change code. */
iram_alloc(SZ_8K, &iram_paddr);
/* Need to remap the area here since we want the memory region
   to be executable. */
ddr_freq_change_iram_base = __arm_ioremap(iram_paddr,
      SZ_8K, MT_MEMORY_NONCACHED);
memcpy(ddr_freq_change_iram_base, mx6_ddr_freq_change, SZ_8K);
mx6_change_ddr_freq = (void *)ddr_freq_change_iram_base;

curr_ddr_rate = ddr_normal_rate;

for_each_online_cpu(cpu) {

[kotteeswarangs]

Hi,

My question is not related to stress test tool.

I completely understood the concept behind stress test tool and I did it.

My point here is after I complete stress test tool, I generated flash_header.S file. RIGHT?

Now I loaded the u-boot image using imx_usb , but I don't see any uboot output..in serial port.

My board is based on sabrelite board and I am using 2009.8 version of uboot.

I hope you understand what is my issues is?

Thanks,

Regards,

Kotteeswaran G S

[BiyongSUN]

Hi,

I read your initial question.

OK.

Please check you iomux setting.

And you can use the iomux tool, which can be downloaded from the website, to check you hardware design.

So far, we think the iomux settings are for the sabrelite not for your board.

Regards,

[kotteeswarangs]

Hi,

How can I verify my iomux settings?

The tool generates c code ..Could you pls help?

Regards,

Kotteeswaran G S

[kotteeswarangs]

Hi,

I have used DDR Stress Test Tool. One point I have noted:

I have to say "no" to write level calibration , then only the test is getting passed,other wise the test is getting failed.

Also in my machine it never get passed, in some other machine it is getting passed (with write level calibration is off).

Is there any issues with hardware?

Thanks,

Regards,

Kotteeswaran G S

[BiyongSUN · Accepted solution]

Hi,

How is your ddr layout?

If it is T topology, no to write leveling.

If it is fly-by, say yes to write leveling.

[BiyongSUN]

1. Before the DDR fine tune by ddr stress test tool, has uart out put.

2. Do the DDR fine tune, get the value.

3. Change the value in the  flash_header.S.

4. After that, boot, no uart out put.

So you load the u-boot by Utils\sb_loader\sb_loader.exe in mfg_tool ?

Can you please try use the sdcard or others ?

[BiyongSUN]

Cause the ddr stress test tool suppose it is under the download mode.

And it can talk to DDR_Stress_Tester.exe through usb protocol.

[AnsonHuang]

Hi, Kotteeswaran

     if you are suspecting DDR settings, you can try iram version uboot? There should be a mx6q_sabresd_iram_config in Makefile, you can refer to it, build a small uboot in iram, then there will be no DDR access in uboot. If it is still not working, then it should be not DDR issue.

     And if you have a JTAG and it can attach to ARM core when failed, then you can see whether it failed in ROM or uboot.

[kotteeswarangs]

Hi,

I built uboot as you said(used mx6q_sabresd_iram_config), but nothing is working

I tried same image in sabre lite , in sabre lite also nothing is coming in serial port.

Thanks,

Regards,

Kotteeswaran G S

[AnsonHuang]

You need to check whether customer's board use same debug UART and boot device as ours, if not, you need to do code change, otherwise, nothing will come up. Do you have JTAG to attach to ARM core when failed?