Jack,
Please look at my comments below.
1.
Basically PREN (Parity Enable) and PROE (Parity Odd/Even) bits of
UARTx_UCR2 registers allows to control the 9-th bit in UART frame,
but – alas – it is not possible to predefine the values of this bit as
MARK or SPACE.
Also, in RS-485 mode 9-th bit is supported : it may used to send any
data (0 /1).
2.
Yes, the UART includes hardware flow control support for request to
send (RTS_B) and clear to send (CTS_B) signals. But DTR and DSR
signals also present.
3.
From “Universal Asynchronous Receiver/Transmitter (UART) Driver”
of "i.MX_6_Linux_Reference_Manual.pdf" : the low-level UART driver has
XON/XOFF software flow control.
Have a great day,
Yuri
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------