Hi all,
I'm trying to implement this patch to imx8mm and i've finally made to capture some data over the mipi csi2 bus. But my current issue is; i have a lot CRC and ECC errors while streaming with gstreamer, with command below:
gst-launch-1.0 v4l2src device="/dev/video0" ! "video/x-raw, format=(string)UYVY, width=(int)1280, height=(int)720, framerate=(fraction)25/1" ! videoconvert ! autovideosink
And it's stderr output:
Additional debug info:
../../../../git/libs/gst/base/gstbasesink.c(3005): gst_base_sink_is_too_late (): /GstPipeline:pipeline0/GstAutoVideoSink:autovideosink0/GstWaylandSink:autovideosink0-actual-sink-wayland:
There may be a timestamping problem, or this computer is too slow.
WARNING: from element /GstPipeline:pipeline0/GstAutoVideoSink:autovideosink0/GstWaylandSink:autovideosink0-actual-sink-wayland: A lot of buffers are being dropped.
Additional debug info:
../../../../git/libs/gst/base/gstbasesink.c(3005): gst_base_sink_is_too_late (): /GstPipeline:pipeline0/GstAutoVideoSink:autovideosink0/GstWaylandSink:autovideosink0-actual-sink-wayland:
There may be a timestamping problem, or this computer is too slow.
WARNING: from element /GstPipeline:pipeline0/GstAutoVideoSink:autovideosink0/GstWaylandSink:autovideosink0-actual-sink-wayland: A lot of buffers are being dropped.
And the capture/error rate from csi driver's debug log of 16 second stream:
[ 239.518263] mxc_mipi-csi.0: mipi_csis_s_stream: 0, state: 0x3
[ 239.518277] mxc_mipi-csi.0: Frame End events: 166
[ 239.522981] mxc_mipi-csi.0: Frame Start events: 158
[ 239.527859] mxc_mipi-csi.0: Non-image data after odd frame events: 0
[ 239.534211] mxc_mipi-csi.0: Non-image data before odd frame events: 0
[ 239.540649] mxc_mipi-csi.0: Non-image data after even frame events: 0
[ 239.547086] mxc_mipi-csi.0: Non-image data before even frame events: 0
[ 239.553611] mxc_mipi-csi.0: Unknown Error events: 0
[ 239.558485] mxc_mipi-csi.0: CRC Error events: 264610
[ 239.563447] mxc_mipi-csi.0: ECC Error events: 426
[ 239.568148] mxc_mipi-csi.0: FIFO Overflow Error events: 0
[ 239.573544] mxc_mipi-csi.0: Lost Frame End Error events: 13
[ 239.579113] mxc_mipi-csi.0: Lost Frame Start Error events: 148505
[ 239.585203] mxc_mipi-csi.0: SOT Error events: 0
I'm using MIPI CSI2 in 4 lane 1 channel mode in YUV422 format.
I just cant understand why the CRC & ECC errors happen and i can't debug/analyse deeper this situation. But i have some questions that is unanswered.
1) What is the use of hs-settle and clk-settle ? Reference manual doesn't have any info about those fields of MIPI registers. I can only find out this post but since imx8mm is differs way too many aspects from other platforms I'm not sure if that applies to my board too.
2) Why csi driver uses MEDIA_BUS_FMT_YUYV8_2X8 format as media format of YUV422 instead of MEDIA_BUS_FMT_UYVY8_2X8 ? Isn't bus format of YUV422 standard as UYVY as stated in MIPI standart or am i comparing apples and oranges in here can someone explain that ?