Toggle timing of the double buffer in i.MX53 IPU

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Toggle timing of the double buffer in i.MX53 IPU

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torus1000
Contributor V

Hi,

I have a question about double buffering feature of i.MX53 IPU.

I know the FSU automatically toggles the DMA_CH_CUR_BUF_# to point on the correct buffer(EBA0 or EBA1) to be used by the channel.

However I would like to toggle it manually by using IPU_CH_BUFx_RDYx register when CH0 transfer done followed by IPU SYNC interrupt(IRQ=11) requested.

In such case when actual toggle will happen? It will switch immediately or wait something?

Can anyone help me? I want to confirm it for the safe screenshot feature.

Thanks.

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igorpadykov
NXP Employee
NXP Employee

Hi torus1000

I am afraid it is not possible to toggle manually DMA_CH_CUR_BUF as

IPU was not designed for such operation. Also manual register writing would

introduce unpredictable delays, so IPU operates using FSU with automatically

toggling DMA_CH_CUR_BUF.

Best regards
igor
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991 次查看
igorpadykov
NXP Employee
NXP Employee

Hi torus1000

I am afraid it is not possible to toggle manually DMA_CH_CUR_BUF as

IPU was not designed for such operation. Also manual register writing would

introduce unpredictable delays, so IPU operates using FSU with automatically

toggling DMA_CH_CUR_BUF.

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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