Hi everyone,
I'm working on a custom IMX8MN board setup and facing a synchronization challenge with two AK5554VN codecs. I'm running Yocto Linux 5.15 and need some guidance to resolve this issue.
Setup Details:
Codecs: Two AK5554VN codecs
Connection:
Codec 1: Connected to SAI5 (Master)
Codec 2: Connected to SAI2 (Slave to SAI5's clocks - externally connected from SAI5 to SAI2)
Objective: I aim to achieve synchronized data reception from both codecs.
Current Process:
According to the AK5554VN datasheet, syncing two devices involves:
- Disabling the MCLK
- Releasing both from reset
- Programming the codec registers via I2C bus for desired operation parameters
- Starting the MCLK
Here is what I see happening in the Drivers:
- MCLKs are stopped
- SAI2 is released from PDN and programmed
- SAI5 is released from PDN
- codec I2C registers are programmed (except for register 0 controlling channel power-on)
- Codec1 Register 0 is programmed enabling channels
- MCLK is released
- Finally, codec0 Register 0 is programmed enabling channels
Issue Encountered: There's a slight delay in data where SAI2 data leads SAI5 data by about 8 samples. See scope shot showing the final Codec0 Register0 i2c transaction occurring after MCLK startup:
Key Question: How can I ensure that codec0 Register 0 is programmed before the MCLK startup to achieve perfect synchronization?
Any insights or suggestions would be greatly appreciated. Thank you in advance for your help!
