Shared ZQ resistor

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george
Senior Contributor II

Dear OliverChen

How should we set Shared ZQ resistance in RPA when using LPDDR4 configured as shown below?

pastedImage_1.png

We do not share anything except Reset_n and RZQ in our schematics.

In such a case, should Shared ZQ resistor be DISABLED?

Best Regards,

George

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oliver_chen
NXP Employee
NXP Employee

Hi george‌,

I'm sorry the term of 'rank' confuses you. RANK used on DDR is chip select (CS).

"Shared ZQ resistor" can be either enabled or disabled in your configuration because there is only 1-rank (1-CS), but DISABLED is better.

B.R

Oliver

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oliver_chen
NXP Employee
NXP Employee

Hi george‌,

How many RANKs do you use? If you only use one-rank LPDDR4, you can set "Enalbe/DIsable Shared ZQ resistor" to DISABLED. If you use two-rank LPDDR4 but you have two ZQ resistors, you also set it to DIABLED. Otherwise, you should set it to ENABLED

B.R

Oliver

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george
Senior Contributor II

Hi OliverChen

Please tell me one last thing.

I may not yet correctly understand the RANK you say.

We use i.MX8M.

Should the "Shared ZQ resistor" be set to Enable when using the LPDDR4 shown in the figure above with the configuration in the table below?

pastedImage_1.png

Best Regards,

George

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oliver_chen
NXP Employee
NXP Employee

Hi george‌,

I'm sorry the term of 'rank' confuses you. RANK used on DDR is chip select (CS).

"Shared ZQ resistor" can be either enabled or disabled in your configuration because there is only 1-rank (1-CS), but DISABLED is better.

B.R

Oliver

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george
Senior Contributor II

Dear OliverChen‌,

Thanks.

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