SGTL5000 RESET

[敏周安井]

We have a custom board with i.MX6SX and a SGTL5000 chip. On that board we are running Linux built with Yocto  and kernel . we have experienced an issue. we play sound on SGTL5000 and after The SGTL5000 registers have been reset.

What is the condition under which the SGTL5000 registers are reset?

Best regards,

[igorpadykov]

Hi 敏周 安井 

reset may be caused by power supply issues, so one can check hardware.

To narrow down issue, one can run sdk sgtl5000 bare metal test (zip can be found on link

SMP Enable in IMX6 )

for linux one can try third party bsps which support sgtl5000 (like BD sabrelite board)

linux-imx6/imx6qdl-sabrelite.dtsi at boundary-imx_4.9.x_8mq_ga-pass1-ath10k · boundarydevices/linux-... 

Best regards
igor
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[敏周安井]

Hi igor

Thank you for your message.

VDDIO and VDDA are used at 3.3v.
How many volts between VDDIO and GND get reset?
And
How many volts between VDDA and GND get reset?

Best regards,

[igorpadykov]

Hi 敏周 安井 

one can refer to p.9 Table 7. Dynamic Electrical Characteristics SGTL5000 datasheet

https://www.nxp.com/docs/en/data-sheet/SGTL5000.pdf 

Best regards
igor

[敏周安井]

Hi igor

I am saying that what is written in the data sheet is a power-up.

I want to know how many volts are reset at power down.

Best regards,

[igorpadykov]

>reset at power down

could you clarify what this means

Best regards,

[敏周安井]

Hi igor

I created the material.

Do you see the materials and understand my question?

Best regards,

[igorpadykov]

Hi 敏周 安井

thanks for the material. Regarding your question - voltage sags are allowed

in range defined for VDDA in Table 3. Recommended Operating Conditions

SGTL5000 datasheet.

Best regards
igor

[敏周安井]

Hi igor

Thank you very much.

Best regards,