SDMA的AP platform 和BP platform 以及SDMA internal(core)的关系

[tongt]

cpu为imx8mp

一、手册中有关于AP platform 和BP platform以及SDMA internal(core)的描述，但是还有一些不清除的：

1、AP platform和BP platform指的是什么

2、这些寄存器中有一些地址是重复的，这个该怎么理解呢？

3、如果只只用ROM中的脚本程序，是不是SDMA internal(core)寄存器可以不用关注？

二、手册中Appendix A SDMA Scripts中的脚本具体该怎么使用呢？是否有相应的例程

[ceggers]

1. I think that the "BP" part (DSP port?) was only present on some i.MX5 devices. It seems that it does not exists on i.MX6 and later. I would also say that the Cortex-M4 on i.MX8 series is connected via "AP" (together with the Cortex-A). This would imply that it is difficult/impossible to use a SDMA instance simultaneously from Cortex-M and Cortex-A.

2. Can you please provide a picture with an example?

3. Sorry, but I do not understand the English translation of this question.

[tongt]

Thank you for your reply.

1、In the latest Reference Manual, there is still a description of the BP Memory Map and Control Register Definitions, SO it looks like this functional component still exists,

2、For example, in Section 7.2.7, 30BD_0000 is SDMAARM1_MC0PTR. In chapter 7.2.8, 30BD_0000 is SDMABP1_DC0PTR. in chapter 7.29, 30BD_0000 is SDMACORE1_MC0PTR. these addresses are the same but have different meanings, why is this, are they time-sharing multiplexed?

3、If I use SDMA as a normal DMA, can I not pay attention to the SDMA Internal (Core) registers?

二、How to use the SDMA Scripts in Appendix A, are there any examples?

[ceggers]

1、In the latest Reference Manual, there is still a description of the BP Memory Map and Control Register Definitions, SO it looks like this functional component still exists,

I guess that the SDMA documentation has simply been copied from previous products.

these addresses are the same but have different meanings, why is this, are they time-sharing multiplexed?

Good question, but as the BP port is probably not connected, I think that no sharing of the SDMA is possible.

3、If I use SDMA as a normal DMA, can I not pay attention to the SDMA Internal (Core) registers?

What does "use SDMA as a normal DMA" mean? The SDMA is more or less an independent processor which is used for performing data transfers between peripherals and (DDR) memory. These data transfers are fully controlled by software ("SDMA scripts"). There is no "dump" DMA mode where the SDMA behaves like a "normal" stupid DMA controller. But some of the existing SDMA scripts (app_2_per, per_2_app) perform "register-to-memory" transfers like a dump DMA would do.

How to use the SDMA Scripts in Appendix A, are there any examples?

This depends a little bit on the OS you use. For Linux you can get almost everything from the kernel sources. If you want to use the SDMA from "bare metall", you can look at some previous SDMA question in this forum.

I personally learned most about the SDMA by developing my SDMA debugger

Are you able to provide some information about your project?

• From which processor (Cortex-A / Cortex-M) do you want to use the SDMA?
• Which OS do you use (on the target platform)?
• Which type of peripheral do you want to access with the SDMA?

[tongt]

Thanks for the reply and the information

1、Extrapolating from some sources BP may be DSP related

I want to use sdma under cortex-M, the system is FreeRTOS and the peripheral is SAI, I think my question should also be related to fifo and watermark, I'm reading up on those!