Question, i.MX6Quad power-on sequence

[SLICE]

Dear team,

I would like to ask about power-on sequence for i.MX6Q.

After reading chapter 4 in your Hardware Development Guide for i.MX6Quad, my customer wants to know whether the following sequence, in the following order, can be allowed.

-  2.8V(VDDHIGH_IN) and 1.2V(NVCC_RGMII) are turned on simultaneously.

-  Then, 3.3V(NVCC_EIM0~2,NVCC_ENET,NVCC_GPIO,NVCC_SD3,NVCC_NANDF,NVCC_JTAG) and 2.5V(NVCC_CSI,NVCC_SD1,NVCC_SD2) are turned on simultaneously.

-  Then, NVCC_DRAM(1.5V) is turned on.

Could you show me whether the above is allowed?

Thanks,

Miyamoto

[igorpadykov · Accepted solution]

Hi Miyamoto

yes such power-up sequence is allowed, note VDD_SNVS_IN supply must be

turned on before any other power supply and it may be connected (shorted) with VDD_HIGH_IN supply.

Best regards
igor
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