Processor pins pull-up configuration resistor value

[nirmalluhana]

Hi,

Release: Yocto-Morty (4.9.51_GA)

Board: i.MX8MQ EVK

I want to configure processors pins as pull-up enabled from dts file but as I am gone through the TRM it indicates the bits for pull-up enabled/disabled.

So, if I set that bits then by which resistor value it is going to be used for pull-up enable?

Or there are any other values of registers available for that purpose?

Best regards,

Nirmal

[gusarambula]

Hello Nirmal,

My apologies for the delay. The Pull Up / Pull Down for each pin is set to a specific value so it can be enabled or disabled but the value is fixed.

On the i.MX8M Reference Manual you can see each pad’s PUE (Pull Up Enable) bit on the register. The value of the pull up resistor is not shown here but you can see if on the Reset condition field on the i.MX8M datasheet. (link below)
https://www.nxp.com/docs/en/data-sheet/IMX8MDQLQCEC.pdf

However, there seems to be a mismatch as some pins show Pull Down instead of Pull Up which is referred to on their registers.

I’ll escalate this, so it gets addressed.
Regards,

[nirmalluhana]

Hi,

Any update on this?

Best regards,

Nirmal

[gusarambula · Accepted solution]

Hello Nimal,

I confirmed that there is an internal 90K Ohm pull down RES on the IOs to avoid excessive current through the resistive voltage divider of input receiver, and to avoid receiver devices overstress at 2.5/3.3V voltage range. There is no control bit for pull down enable/disable. The pull down is described as “always on 90k pd res”

There is a Pull Up Enable (PUE on the GPIO registers) but it only controls the internal 27K Ohm pull up RES enable/disable.

Regards,

[nirmalluhana]

Thanks gusarambula,

Appreciate your support.

Regards,

Nirmal