Problem with waking from WFI on iMX6SL

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Problem with waking from WFI on iMX6SL

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nathanpalmer
Contributor IV

I have been trying for a while to resolve this but I think I need some help.  

I cannot get the ARM to wake up properly after executing a WFI instruction when caching is on.  The system wakes up, but immediately has an exception (not sure which one).  It seems to work as expected with caching turned off.

I assume that I need to do some cache maintenance, but I am not sure exactly what to do.  I have tried Clean/Invalidate/Flush before the WFI instruction and various combinations of cache enable/disable with no luck.  I am using the ccm_enter_low_power() Baremetal BSP function from Freescale and I have looked at how Linux does the WFI instruction but I am still missing something.


Is there an app note or section of the RM that anyone can point me to that explains the Cache relationship with WFI?  Or other WFI gotchas that might apply?


Thanks!

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nathanpalmer
Contributor IV

The problem I was having is that the boot loader was masking the GPC_IMR* registers and I was failing to un-mask them.  This caused NO interrupt source to wake from the WFI state.

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nathanpalmer
Contributor IV

The problem I was having is that the boot loader was masking the GPC_IMR* registers and I was failing to un-mask them.  This caused NO interrupt source to wake from the WFI state.

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CarlosCasillas
NXP Employee
NXP Employee

Hi Nathan,

The information regarding WFI and instruction set is not included on i.MX6 Reference Manual because it is explained on ARM’s documentation. You could refer to Cortex-A9 Technical Reference Manual at the following link:

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0388i/index.html

Hope this will be useful for you.
Best regards!
/Carlos

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nathanpalmer
Contributor IV

Thanks for the reply.  I have read that document looking for the answer but I must be missing it.  I am trying to use the basic Standby WFI mode with the ARM CPU clock disabled (http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0388i/Chdejjdj.html).

One thing that comes to mind after reading your post is that my MMU TLB tables are stored in the OCRAM on the iMX6.  Is the OCRAM un-clocked or powered down when the ARM enters WFI mode? Maybe I need to move my tables (and other data) off of the OCRAM.  I will research that now.

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