i.MX6 errata 765569 states that the prefetch offset of the aux control register of the PL310 should be set to any value but 23. By default, this value is 0. Why is NXP's BSP setting this value to 0xf instead of leaving it set to 0 ?
Best regards,
Vincent
Solved! Go to Solution.
Hi Vincent
please check
Best regards
igor
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Hi Vincent
please check
Best regards
igor
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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Great, thank you !