PL310, prefetch & errata 765569

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PL310, prefetch & errata 765569

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vsiles
Senior Contributor I

i.MX6 errata 765569 states that the prefetch offset of the aux control register of the PL310 should be set to any value but 23. By default, this value is 0. Why is NXP's BSP setting this value to 0xf instead of leaving it set to 0 ?

Best regards,

Vincent

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igorpadykov
NXP Employee
NXP Employee

Hi Vincent

please check

MLK-10496: Check the PL310 version for applying errata (5b983bdc) · Commits · Hera / u-boot-imx · Gi... 

Best regards
igor
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igorpadykov
NXP Employee
NXP Employee

Hi Vincent

please check

MLK-10496: Check the PL310 version for applying errata (5b983bdc) · Commits · Hera / u-boot-imx · Gi... 

Best regards
igor
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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vsiles
Senior Contributor I

Great, thank you !

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