Multiple pin interrupts on same GPIO port

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

Multiple pin interrupts on same GPIO port

882件の閲覧回数
ddeyo1
Contributor I

I am writing code for the M4 on an iMX8mm som.  My m4 code has 4 pins (4,5,6,7) on GPIO4 configured as interrupts.  From the documentation, it looks like interrupts 0-15 are all managed in one ISR.

Is it possible to manage multiple interrupts on the same GPIO port?

Currently when I generate two GPIO interrupts on GPIO4 I will get sometimes only get one interrupt.

Since the GPIO's are all on the same port, the priority is the same.

 

How can I configure GPIO4 to manage simultaneous interrupts on GPIO port 4?

0 件の賞賛
返信
1 返信

863件の閲覧回数
JorgeCas
NXP TechSupport
NXP TechSupport

Hello,

That is correct, the interrupts areOR'ed together to generate two one-bit interrupt lines:

Combined interrupt indication for GPIOx signals 0 - 15.
Combined interrupt indication for GPIOx signals 16 - 31.

It is not possible to manage simultaneous interrupts, when an interrupt condition has been met for the corresponding input signal you need to read GPIO interrupt status register to check which pin detected an interrupt and attend each interrupt per time.

Best regards.

0 件の賞賛
返信