Hello,
I like to know what the maximum clock-rate is, that is allowed to be assigned to the i.MX 93 flexcan controller.
Background of my question:
The CAN controller clock-rate impacts the granularity of the flexcan sample-points. Currently we have assigned 40MHz to the CAN controller (see the dts snippet below). 40MHz allows sample point to only be selected in 0.2 steps. But our customer need steps of 0.1 or even better 0.05. So, does the CAN controller support more than 40MHz for the clock rate? And what is the maximum rate?
Sorry, I checked the i.MX 93 reference manual and datasheet, but I did not found any maximum rate for the flexcan interface.
See here the DTS snippet with our 40MHz configuration:
HOST:~/linux-imx/arch/arm64/boot/dts/freescale$ grep can imx93.dtsi -A12
flexcan1: can@443a0000 {
compatible = "fsl,imx93-flexcan";
reg = <0x443a0000 0x10000>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_BUS_AON>,
<&clk IMX93_CLK_CAN1_GATE>;
clock-names = "ipg", "per";
assigned-clocks = <&clk IMX93_CLK_CAN1>;
assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
assigned-clock-rates = <40000000>;
fsl,clk-source = /bits/ 8 <0>;
fsl,stop-mode = <&aonmix_ns_gpr 0x14 0>;
status = "disabled";
};
--
flexcan2: can@425b0000 {
compatible = "fsl,imx93-flexcan";
reg = <0x425b0000 0x10000>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
<&clk IMX93_CLK_CAN2_GATE>;
clock-names = "ipg", "per";
assigned-clocks = <&clk IMX93_CLK_CAN2>;
assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
assigned-clock-rates = <40000000>;
fsl,clk-source = /bits/ 8 <0>;
fsl,stop-mode = <&wakeupmix_gpr 0x0c 2>;
status = "disabled";
};
Thanks and regards,
Christoph
