Keeping the GPIO output level.

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 
已解决

Keeping the GPIO output level.

跳至解决方案
1,285 次查看
tomo
Contributor II

Hello,

I am debugging our custom board that used i.MX 6Solo.
I want to keep GPIO port level from before reset until after reset.
For example, EIM_A17 has been set to high level before reset and I want to keep until after reset.
I tried by the warm reset(watchdog reset) that, but level is not keep.
Is i.MX6 can this behavior?

Best regards,

tomo

标签 (1)
0 项奖励
回复
1 解答
1,179 次查看
RossMcLuckie
NXP Employee
NXP Employee

Hi Tomo,

Unfortunately once a reset is applied the GPIO (IOMUX cells) reset to the state defined in the datasheet, in most cases this will be an input, taken from the datasheet table -

pastedImage_1.png

If you need a fixed high or low, you could use a pull resistor to set the level you need, but if you need to program a variable state and have that held during a reset sequence you will need to use an external latch to achieve this.

Regards

Ross

在原帖中查看解决方案

0 项奖励
回复
1 回复
1,180 次查看
RossMcLuckie
NXP Employee
NXP Employee

Hi Tomo,

Unfortunately once a reset is applied the GPIO (IOMUX cells) reset to the state defined in the datasheet, in most cases this will be an input, taken from the datasheet table -

pastedImage_1.png

If you need a fixed high or low, you could use a pull resistor to set the level you need, but if you need to program a variable state and have that held during a reset sequence you will need to use an external latch to achieve this.

Regards

Ross

0 项奖励
回复