Is a tamper detection pin enabled when it is not used as GPIO?

[Hirotoshi_Sato]

Hi, I would like to know about TAMPER_PIN_DISABLE.

I use i.mx6ull CPU, so I referenced IMC6ULLRM.pdf

According to the manual,  definition of TAMPER_PIN_DISABLE[1:0] are as following :

        00 - enabled, TAMPER0-9 used as TAMPER detection pins.

        01 - disabled, TAMPER2-4 and TAMPER7-9 used as GPIO.

        10 - disabled, TAMPER0-1 and TAMPER5-6 used as GPIO.

        11 - disabled, TAMPER0-9 used as GPIO.

 (these are copied from Yuri's answer at mx6ul tamper pin to gpio  )

When I did "fuse read 0 3", I got 10 at [21:20].

It means that  TAMPER0-1 and TAMPER5-6 used as GPIO.

How about TAMPER2-4 and TAMPER7-9?

Do they work as tamper detection pins?

"enabled" is written only when fuse is 00, so I confused.

[igorpadykov]

Hi Hirotoshi

in i.MX6ULL Tamper0 - 9 can not be used as tamper pins,

they are disabled via fusing during production. Can be used only as GPIOs.

Best regards
igor
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[Hirotoshi_Sato]

Thank you very much for your quick answer.

Do you intend that we can not transit RUN mode from SNVS mode?

Actually now my board can not run whatever I do after shutdown by "poweroff" command.

Only solution I found is removing CPU from my board and reconnect it.

I think my board entered SNVS mode even though there are no tamper pins.

May that case possible? If so, I think I have to remove VDD_SNVS_IN in order not to enter SNVS mode.