Interlaced signal from MIPI camera

[jotes]

Hello!

I am trying to get interlaced signal (1080i60) from MIPI camera, but I am not sure, if IPU is able to handle that kind of format. If so, could you please explain me, how IPU CSI distinguishes between two fields (even and odd) of one frame.

Regards!

[Yuri]

The IPU Interrupt Status Registers may be used to detect EOF events (between odd / even fields ).
Note, there is special IPU module - the VDIC (Video De-Interlacer and Combiner).

It performs de-interlacing - converting interlaced video to progressive - or combining.
Next, please look at Table 9-4 (Time-Shared Data Flows Through The IPU) of the i.MX6DQ
Reference Manual for possible scenarios of IPU using. Also, section 37.1.2.1.1 (Camera Ports)
provides supported options for the MIPI.

[jotes]

I have another questions, because I still do not understand how actually this whole de-interlacing process is working.

When working with NTSC source signal from parallel camera (sensor protocol set as CCIR interlaced mode - BT.656), I used mxc_v4l2_capture.out test from /unit_tests (BSP: L3.0.35_4.1.0). As an input parameter I can choose an input mode (0-use csi->prp_enc->mem, 1-use csi->mem) and depending on the chosen mode I have two different outputs (please look at the pictures attached).

First one (csi->prp_enc->mem) looks like two fields of one interleced frame placed one above the other. Second of them (csi->mem) looks like a frame after de-interlacing - but after checking IPU registers, I can see that VDIC block is not used.

So my question is: how is this second output generated? Is it some kind of software de-interlacing (instead of hardware VDIC block)? Are CCIR codes used to detect odd and even fields?

[jamiew]

Hi Jotes

Did you ever manage to detect which was the odd and even fields?

I am capturing a field at a time but don't know which is which.

Thanks

Jamie