How to generate PWM signal on iMX8ULP?

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

How to generate PWM signal on iMX8ULP?

Jump to solution
691 Views
wendy-liu
Contributor II

Dear all,

    I found tpm5 device node in imx8ulp.dtsi, I enable it.

    I chose PTF19 (J20 pin3) to generate PWM signal.

image.png

   But I can't fing anything under sysfs,such as /sys/class/tpm or /sys/class/pwm/.I use oscilloscope to measure it waveform , and it keeps outputting a high-level signal.

   My dts ,config, log are as below.

    Hope your reply!Thanks a lot!

Best Regards!

Labels (1)
0 Kudos
Reply
1 Solution
529 Views
Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hello,

Do you solve this issue? I see you have another case about other TPMs clock issue, the TPM clock is generated in ATF: plat/imx/imx8ulp/imx8ulp_bl31_setup.c

	/* config the TPM5 clock */
	mmio_write_32(IMX_PCC3_BASE + 0xd0, 0x92000000);
	mmio_write_32(IMX_PCC3_BASE + 0xd0, 0xd2000000);



Best Regards,
Zhiming

View solution in original post

0 Kudos
Reply
20 Replies
117 Views
wendy-liu
Contributor II

Hello!

Here are some updates  I'd like to share with you.

Fortunately, I enable TPM7 CH5(PTF25) successfully, but there is no output waveform.

my device node  :

+tpm7: tpm@29830000 {
+ //compatible = "fsl,imx8ulp-tpm", "fsl,imx7ulp-tpm";
+ compatible = "fsl,imx7ulp-pwm";
+ reg = <0x29830000 0x10000>;
+ //interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pcc4 IMX8ULP_CLK_TPM7>, <&pcc4 IMX8ULP_CLK_TPM7>;
+ assigned-clocks = <&pcc4 IMX8ULP_CLK_TPM7>;
+ assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
+ //assigned-clock-rates = <48000000>;
+ //clock-names = "ipg", "per";
+ status = "okay";
+};

+&tpm7 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_tpm7>;
+ #pwm-cells = <3>;
+};

pinctrl_tpm7: tpm7grp {
                fsl,pins = <
                        MX8ULP_PAD_PTF25__TPM7_CH5      0x2
                >;
};
 
my commands :
root@imx8ulp-lpddr4-evk:/sys/class/pwm/pwmchip8# echo 5 > export
root@imx8ulp-lpddr4-evk:/sys/class/pwm/pwmchip8# cd pwm5/
root@imx8ulp-lpddr4-evk:/sys/class/pwm/pwmchip8/pwm5# echo 400000 > period
root@imx8ulp-lpddr4-evk:/sys/class/pwm/pwmchip8/pwm5# echo 200000 > duty_cycle
root@imx8ulp-lpddr4-evk:/sys/class/pwm/pwmchip8/pwm5# echo 1 > enable
root@imx8ulp-lpddr4-evk:/sys/class/pwm/pwmchip8/pwm5#
0 Kudos
Reply
112 Views
Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hello,

Do you solve this issue? I just get notification from system, you can add more print in the pwm driver to check if the hardware status.


Best Regards,
Zhiming

0 Kudos
Reply
43 Views
wendy-liu
Contributor II

yes, I have been solved! Thanks a lot!

0 Kudos
Reply
624 Views
wendy-liu
Contributor II

Could you test it on iMX8ULP-evk board?

0 Kudos
Reply
619 Views
Zhiming_Liu
NXP TechSupport
NXP TechSupport

Sure

0 Kudos
Reply
617 Views
wendy-liu
Contributor II

Looking forward to your reply!Thank you very much!

Best Regards!

0 Kudos
Reply
530 Views
Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hello,

Do you solve this issue? I see you have another case about other TPMs clock issue, the TPM clock is generated in ATF: plat/imx/imx8ulp/imx8ulp_bl31_setup.c

	/* config the TPM5 clock */
	mmio_write_32(IMX_PCC3_BASE + 0xd0, 0x92000000);
	mmio_write_32(IMX_PCC3_BASE + 0xd0, 0xd2000000);



Best Regards,
Zhiming

0 Kudos
Reply
120 Views
wendy-liu
Contributor II

Hello , pwm signal of TPM5 CH0 is successfully generated!

Now , I'm facing another problem...I successfully enable pwm signal of TPM7 CH5(PTF25), but there is no output waveform

 

tpm7: tpm@29830000 {
//compatible = "fsl,imx8ulp-tpm", "fsl,imx7ulp-tpm";
compatible = "fsl,imx7ulp-pwm";
reg = <0x29830000 0x10000>;
//interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pcc4 IMX8ULP_CLK_TPM7>, <&pcc4 IMX8ULP_CLK_TPM7>;
assigned-clocks = <&pcc4 IMX8ULP_CLK_TPM7>;
assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
//assigned-clock-rates = <48000000>;
//clock-names = "ipg", "per";
status = "okay";
};

&tpm7 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tpm7>;
#pwm-cells = <3>;
};

pinctrl_tpm7: tpm7grp {
fsl,pins = <
MX8ULP_PAD_PTF25__TPM7_CH5 0x2
>;
};

root@imx8ulp-lpddr4-evk:/sys/class/pwm/pwmchip8/pwm5# echo 400000 > period
root@imx8ulp-lpddr4-evk:/sys/class/pwm/pwmchip8/pwm5# echo 200000 > duty_cycle
root@imx8ulp-lpddr4-evk:/sys/class/pwm/pwmchip8/pwm5# echo 1 > enable

0 Kudos
Reply
665 Views
Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hello,

The EVK dts also use tpm5 , can you try the 0x57e pinctrl value?

	pinctrl_tpm5: tpm5grp {
		fsl,pins = <
			MX93_PAD_GPIO_IO06__TPM5_CH0		0x57e
		>;
	};



Best Regards,
Zhiming

0 Kudos
Reply
660 Views
wendy-liu
Contributor II

@Zhiming_Liu 

Thanks for your advice.I tried it, But it doesn't work.......

0 Kudos
Reply
656 Views
Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hello,

Please comment these two lines and try again.

 

cs-gpios = <&gpiof 19 GPIO_ACTIVE_LOW>;

MX8ULP_PAD_PTF19__PTF19 0x43



Best Regards,
Zhiming

0 Kudos
Reply
651 Views
wendy-liu
Contributor II

@Zhiming_Liu 

sorry, i did't see "these two lines".

Could you send me again? I will try it!

0 Kudos
Reply
648 Views
Zhiming_Liu
NXP TechSupport
NXP TechSupport

updated

0 Kudos
Reply
643 Views
wendy-liu
Contributor II

sorry, it also did't work

0 Kudos
Reply
638 Views
Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hello,

1. The default dtsi tpm node is using tpm timer driver and there is no pwm driver using tpm. That's why you can't see the /sys/class/pwm

 

2.To use pwm tpm driver, you need modify dtsi like this:

			tpm5: tpm@29340000 {
				compatible = "fsl,imx7ulp-pwm";
				reg = <0x29340000 0x1000>;
				// interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&sosc>, <&sosc>;
				// clock-names = "ipg", "per";
				#pwm-cells = <3>;
				status = "okay";
			};

3. I can see pwm  node after modifing it.

root@imx8ulpevk:/sys/class/pwm/pwmchip0/device/of_node# cat compatible
fsl,imx7ulp-pwmroot@imx8ulpevk:/sys/class/pwm/pwmchip0/device/of_node#


Best Regards,
Zhiming

0 Kudos
Reply
634 Views
wendy-liu
Contributor II

wow, after modifying it, i can control duty_circle and period under sysfs.

But I measure it waveform , it still keeps outputting a high-level signal.

0 Kudos
Reply
632 Views
Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hello,

Where is your test point on evk?


Best Regards,
Zhiming

0 Kudos
Reply
630 Views
wendy-liu
Contributor II

PTF19 (J20 pin3)

pinctrl_tpm5: tpm5grp {
        fsl,pins = <
                 MX8ULP_PAD_PTF19__TPM5_CH0 0x19e
        >;
};

0 Kudos
Reply
627 Views
Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hello,

The signal from PTF19 is muxed to EPDC_D4 or PTF19_PTF19

 

 

image (1).png

 

Try to include below line in tpm5 node.

pinctrl-assert-gpios = <&pca6416_1 10 GPIO_ACTIVE_LOW>;



Best Regards,
Zhiming

0 Kudos
Reply
625 Views
wendy-liu
Contributor II

Thanks for your helping!But it still doesn't work(T_T)

0 Kudos
Reply