Support for imx8mp PCIe as EP

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Support for imx8mp PCIe as EP

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deepakraj
Contributor III
Hi 
 
We would like to get a PCIE-EP device to detect the PCIE-RC device, please refer below observation.
 
1 Device tree changes 
 
In our module imx8mp scarthgap BSP, we tried the below device tree changes to enable PCIe-EP. 
&pcie_phy {
fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
clocks = <&pcie0_refclk>;
clock-names = "ref";
ext_osc = <1>;
status = "okay";
};
 
&pcie_ep {
ext_osc = <1>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie0>;
};
 
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie0>;
reset-gpio = <&gpio4 20 GPIO_ACTIVE_LOW>;
host-wake-gpio = <&gpio5 21 GPIO_ACTIVE_LOW>;
status = "disabled";
};
 
 
2 Our setup configuration:
 
 The PCIE EP refer clock comes from host module., Refer attached image. 
 
3 Enabling PCIe as Endpoint
 
 Boot up the board with the PCIe working in RC mode (As PCIE EP refer clock comes from the host)
 Boot up the board with the PCIe working in EP mode
 Stop at u-boot and update the kernel command line : 
console=ttymxc2,115200 root=/dev/mmcblk1p2 rootwait rw pcie_cz_enabled=yes
 Boot kernel and check PCIe in dmesg 
root@lec-imx8mp:~# dmesg | grep pci
[    0.000000] Kernel command line: console=ttymxc2,115200 root=/dev/mmcblk1p2 rootwait rw pcie_cz_enabled=yes
[    0.000000] Unknown kernel command line parameters "pcie_cz_enabled=yes", will be passed to user space.
[    2.515586] imx6q-pcie 33800000.pcie-ep: iATU: unroll T, 4 ob, 4 ib, align 64K, limit 16G
[    2.524691] imx6q-pcie 33800000.pcie-ep: eDMA: unroll T, 2 wr, 2 rd
[    3.198659]     pcie_cz_enabled=yes
 Run the below command to enable the PCIe 
  Refer to Enable-pcie-ep.txt 
       we can get output as [  218.973209] imx6q-pcie 33800000.pcie-ep: PCIe Gen.1 x1 link up
 
4 On the RC mode PCIe module, we ran the below command , but could not get any output
lspci -vxxx -d 0x1957:0x81c0
 
 
please share your inputs to detect PCIe-up on the other end.
 
Thanks
 
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Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hello,

1. Hardware connection is correct

2.For the ext_osc property, i don't see there is any code to handle it in L6.6.y pcie or pcie phy driver. This property has been removed. In our test(two EVKs), we just need to use imx8mp-evk-pcie-ep.dts on ep side.

3. No need to set pcie_cz_enabled=yes

4.  You can try to boot EP and setup EP with those functions entry, boot the RC, then the RC could scan the EP successfully.

Best Regards,
Zhiming

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deepakraj
Contributor III

Hi 

We tried to boot the PCIe-ep module first and the kernel struck with an error, after powering on the host RC module, the PCIe-ep module still struck at kernel only.

deepakraj_0-1741926919698.png

Please refer to the attached dts and defconfig file. 

Please share your input

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1,636 Views
Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hello,

In your hardware design, the RC provide the REF clock. So your first try is correct, but the current drivers can't support rescan which means that the RC can't scan the EP. You can try below two patches to enable it.

There is one solutions to remove devices and rescan.

root@imx8mpevk:~# echo 1 > /sys/bus/pci/devices/0000\:00\:00.0/remove
root@imx8mpevk:~# echo 1 > /sys/devices/platform/33800000.pcie/pcie_dis
root@imx8mpevk:~# echo 0 > /sys/devices/platform/33800000.pcie/pcie_dis
root@imx8mpevk:~# echo 1 > /sys/bus/pci/rescan



Best Regards,
Zhiming

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Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hello,

Are you using external reference clock or internal reference clock?

Best Regards,
Zhiming

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deepakraj
Contributor III

Hi 


The PCIe reference clock of PCIE EP comes from the host RC module.


Thanks

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deepakraj
Contributor III
 
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