How to debug wdog in imx-93

[leoX]

I enabled the debug bit in the wdog CS register, but when I debug with J-Link and set breakpoints, the wdog still times out and triggers a reset. How can I resolve this issue? Additionally, I used the tstmr, but the timestamp continues to update after I set a breakpoint, and the debug bit in the system counter's CNTCR register also has no effect. Does the i.MX-93 have a global debug switch that I might have overlooked? Thank you for your response!

[leoX]

    WDOG32_GetDefaultConfig(&wdg_config);

    wdg_config.testMode = kWDOG32_UserModeEnabled;

    wdg_config.enableInterrupt = true;

    wdg_config.clockSource  = kWDOG32_ClockSource1;

    wdg_config.prescaler    = kWDOG32_ClockPrescalerDivide1;

    wdg_config.timeoutValue = 9600U;

    wdg_config.workMode.enableDebug = true;

(void)WDOG32_Init(wdog32_base, &wdg_config);

SYS_CTR_CONTROL->CNTCR |= 0x02U;

This is my config code, the last is sctr config.

Best Regards

[Zhiming_Liu]

Hi @leoX 

Can you share where you set the breakpoint? I set here and don't see watchdog reset.

Zhiming_Liu_0-1752644497900.png

Best Regards,
Zhiming

[leoX]

Hi Zhiming

I tried it on EVK and my board, and the reset occured on two boards, and I'd like to confirm if you can resume running from the breakpoint after stopping at it? I was also able to run to the breakpoint, but when I reset at the breakpoint, I couldn't continue running

leoX_0-1753170159686.png

[Zhiming_Liu]

Hi @leoX 

The refresh cycle cannot be stopped. If it is stopped, the counter will stop being cleared. When the counter is full, an interrupt is triggered to reset it. So you should not set breakpoint in that loop.

Best Regards,
Zhiming

[leoX]

Hi Zhiming

That means when the breakpoint halts the mcu,  the couter is still running？

Best Regards.

[Zhiming_Liu]

Hi,

The core is reset when you meet this issue, not halted.

Best Regards,
Zhiming

[leoX]

Hi Zhiming

So in fact, when wdog is turned on, I can not set breakpoint during debugging because it will reset. Even if the debug position is set to 1, in other words, when a breakpoint is set, both the wdog counter and the system counter are continuously counting. Is that true?

Best Regards.

[Zhiming_Liu]

Hi,

Even if the debug position is set to 1, in other words, when a breakpoint is set, both the wdog counter and the system counter are continuously counting.

-->If you set breakpoint in refresh loop, this will stop feeding watchdog, causing reset.The debug flag is not used to debug watchdog step by step, that flag make sure watchdog can work under soc debug mode.

Zhiming_Liu_2-1753324007349.png

Zhiming_Liu_0-1753323907268.png
Best Regards,
Zhiming

[leoX]

Hi

Is there a way to halt the wdog counter and system counter while debugging? Is there anything I can do when I want to step through code other than disable wdog?

Best Regards.

[Zhiming_Liu]

Hi,

I think the only way is to avoid step over debug refreshing wdog code.

Best Regards,
Zhiming

[leoX]

Hi

I want to halt the counter during breakpoint debugging; otherwise, when running from the breakpoint, the controller environment will have already changed. In my project, no matter where I set a breakpoint, as long as the wdog is enabled, it will trigger a reset, making debugging impossible, but thank you for your response.

Best Regards.

[leoX]

I set up a watchdog in my project, using wdog1 to monitor the operation of m33. However, even when I set the debug bit of the wdog cs to 1 and use JLink to debug with breakpoints, a reset still occurs (entering my watchdog interrupt function).

Best Regards

[Zhiming_Liu · Accepted solution]

Hi @leoX 

Can you add tstmr based on the wdog demo and then try to reproduce it?

At least the debug function can work on wdog demo, maybe there are some usage issues. That's better to provide a simple demo that can reproduce it on my side.

Best Regards,
Zhiming

[leoX]

    WDOG32_GetDefaultConfig(&config);

    config.testMode = kWDOG32_UserModeEnabled;

    config.clockSource  = kWDOG32_ClockSource0;

    config.prescaler    = kWDOG32_ClockPrescalerDivide256;

    config.windowValue  = 6000U;

    config.timeoutValue = 60000U;

    config.workMode.enableDebug = true;

    PRINTF("\r\n----- Refresh test start -----\r\n");

    /* Refresh test in none-window mode */

    PRINTF("----- None-window mode -----\r\n");

    config.enableWindowMode = false;

    config.enableWdog32     = true;

    WDOG32_Init(wdog32_base, &config);

#if defined(FSL_FEATURE_WDOG_HAS_ERRATA_010536) && FSL_FEATURE_WDOG_HAS_ERRATA_010536

    /* Becaues of ERR010536, application need to wait at least 4 LPO clock

     * after WDOG32_Init before any other WDOG32 operations.

     */

    Wdog32Errata010536();

#endif

    for (int i = 0; i < 10; i++)

    {

        for (;;)

        {

            if (1000 * i < WDOG32_GetCounterValue(wdog32_base))

            {

                PRINTF("Refresh wdog32 %d time\r\n", i);

                WDOG32_Refresh(wdog32_base);

                break;

            }

        }

    }

This is my code based on the wdog demo, could you show me yours? Thanks!

Best Regards.

[Zhiming_Liu]

Hi @leoX 

I add these two lines and set breakpoint in WDOG32_Refresh

Zhiming_Liu_0-1752722440614.png

Best Regards,
Zhiming

[leoX]

Hi. Zhiming

I modified the code as yours and  set the boot mode to 1010 from M33 core , but it didn't work.

Best Regards.

[Zhiming_Liu]

Hi,

Can you try the a53 download mode or m33 download mode ? And the previous test is based on Debug , not Attach.

Best Regards,
Zhiming

[leoX]

Hi,

Could you explain it more clearly? Do you mean using the serial download mode? Thanks.

Best Regards.

[Zhiming_Liu]

Hi @leoX 

Yes, currently i am using coterx-a download mode.

Zhiming_Liu_0-1753058871553.png

Best Regards,
Zhiming

[leoX]

Hi Zhiming,

Do you mean using the uuu command to download the bin file to the m core?

Best Regards.