How to configure iMX6UL CLK1_P/N as output pin

[freescale_jive]

Hello, I would like to check:

1. Are the signals CCM_CLK1_P/N described in iMX6UL datasheet correspond to the pin CLK1_P/N ?

2. The datasheet mentioned that these 2 signals can be used "To output internal SoC clock to be used outside....".

May I know which section in iMX6UL RM describes how to do it? what are the registers? how to select clock source and divider etc ?

3. The closest description I can find in RM is "CCM_CLKO1/2". Are these signals routed to CLK1_P/N pins ?

Thanks!

Thomas

[igorpadykov · Accepted solution]

Hi Thomas

configuration is described in sect.38.6.6 Miscellaneous Register 1 (PMU_MISC1n)

field LVDS1_CLK_SEL, i.MX6UL Reference Manual (rev.0  8/2015)

http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6ULRM.pdf

Best regards

igor

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