An internal 100kOhm pull-down resistor can be enabled on most of GPIO pins by appropriately configuring the corresponding IOMUXC_SW_PAD_CTL_PAD_<xxx> register, where <xxx> is the corresponding pin name. The sequence is as follows.
1. Set the IOMUXC_SW_PAD_CTL_PAD_<xxx>[PUS] bits to 0b00 to select the 100kOhm pull-down resistor.
2. Set the IOMUXC_SW_PAD_CTL_PAD_<xxx>[PUE] bit to 1 to enable the pull resistor (not a keeper circuit).
3. Set the IOMUXC_SW_PAD_CTL_PAD_<xxx>[PKE] bit to 1 to physically enable the pull resistor.
For more information, refer to the Chapter 30 "IOMUX Controller (IOMUXC)" of the i.MX6SoloLite Reference Manual Rev.2 document, available on the i.MX6SoloLite Documentation web page:
http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/i.mx-applications-process...
Have a great day,
Artur
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------