Hello,
I am currently working on modifying the OV5640 mipi driver so it can work for our custom camera sensor on the SABRE board. In the device tree of the sabre board there is the following configuration:
&mipi_csi {
clock-frequency = <240000000>;
status = "okay";
port {
mipi_sensor_ep: endpoint1 {
remote-endpoint = <&ov5640_mipi_ep>;
data-lanes = <2>;
csis-hs-settle = <13>;
csis-clk-settle = <2>;
csis-wclk;
};
csi_mipi_ep: endpoint2 {
remote-endpoint = <&csi_ep>;
};
};
};
I can see in the driver that the csis-hs-settle and csis-clk-settle parameter set the corresponding parameters in the MIPI_CSI2_DPHY_CMN_CTRL register. In the datasheet however, there is no mention what these values actually mean. Since the Ths-settle time of the receiver on the PHY is a very critical parameter to get the MIPI working i would like to know what the meaning of this value 13 is. Anybody any idea?
Also it is not clear to me what clock-frequency parameter exactly does. If i look into the driver, i see that this sets the mipi_clk. When i measure the clock on the mipi clk lane for the OV5640, i measure a frequency of 112MHz. So i don't understand why you would need to set the D-PHY mipi clk to 240Mhz. Does this have to be in a certain range so that the PHY can lock on the mipi clk?
Thanks for your help.
Solved! Go to Solution.
For "clock-frequency = <240000000>;", it is used to set the MIPI CSI host's working clock, MIPI_CSI_CLK_ROOT. You don't need modify it.
A table for MIPI clock frequency and register setting of HSSETTLE[7:0] and CLKSETTLECTL[1:0] had been missed in iMX7D reference manual.
MIPI Serial clock Frequency (MHz) | HSSETTLE[7:0] | CLKSETTLECTL[1:0] |
1500 | 33 | 0 |
1490~1450 | 32 | 0 |
1440~1410 | 31 | 0 |
1400~1360 | 30 | 0 |
1350~1320 | 29 | 0 |
1310~1270 | 28 | 0 |
1260~1230 | 27 | 0 |
1220~1180 | 26 | 0 |
1170~1130 | 25 | 0 |
1120~1090 | 24 | 0 |
1080~1040 | 23 | 0 |
1030~1000 | 22 | 0 |
990~950 | 21 | 0 |
940~910 | 20 | 0 |
900~860 | 19 | 0 |
850~820 | 18 | 0 |
810~770 | 17 | 0 |
760~730 | 16 | 0 |
720~680 | 15 | 0 |
670~640 | 14 | 0 |
630~590 | 13 | 0 |
580~550 | 12 | 0 |
540~500 | 11 | 0 |
490~460 | 10 | 0 |
450~410 | 9 | 0 |
400~370 | 8 | 0 |
360~320 | 7 | 0 |
310~280 | 6 | 0 |
270~230 | 5 | 0 |
220~190 | 4 | 0 |
180~140 | 3 | 0 |
130~100 | 2 | 0 |
90~80 | 1 | 0 |
I'm afraid this doesn't seem correct. Using the imx_5.4.70_2.3.0 kernel branch unmodified, with csis-clk-settle set to 2, images can be captured. When setting csis-clk-settle to 0, no frame is produced by the device. I've started a thread to focus on this particular issue in https://community.nxp.com/t5/i-MX-Processors/How-to-compute-S-CLKSETTLECTL-value-for-MIPI-CSI-2-rece.... Knowing how to calculate the S_CLKSETTLECTL value is especially important when bringing up a different camera sensor.
But then I still don't understand why value 13 is used for the OV5640 driver on the SABRE board. When I measure the mipi clock with a scope I get the 112MHz (224MHz DDR), while according to your table the value 13 corresponds to 590~630MHz. How is it possible that this works for the OV5640?
The ov5640 has many resolution, we used a higher setting, and it works for all modes.
For your camera, you can follow the table.