DDR stress tester issue

[cornébos]

I just assambled a new board with an i.mx6ull (MCIMX6Y2DVM09AB) processor and 512Mb (MT41K256M16TW-107:P). I have an issue with the DDR stress test tool. The board is recognized by windows and the supply voltages on the boards seem to be ok. 

When starting the DDR stress test tool it gets stuck at "Starting DQS gating calibration". Does anyone know why it could be stuck at this point, is it something wrong in the setup? What can I look for to solve this issue?

============================================
        DDR Stress Test (3.0.0) 
        Build: Dec 14 2018, 14:13:23
        NXP Semiconductors.
============================================

============================================
        Chip ID
CHIP ID = i.MX6 UltraLiteLite(0x65)
Internal Revision = TO1.1
============================================

============================================
        Boot Configuration
SRC_SBMR1(0x020d8004) = 0x00000837
SRC_SBMR2(0x020d801c) = 0x02000001
============================================

ARM Clock set to 528MHz

============================================
        DDR configuration
DDR type is DDR3 
Data width: 16, bank num: 8
Row size: 15, col size: 10
Chip select CSD0 is used 
Density per chip select: 512MB 
============================================

Current Temperature: 25
============================================

DDR Freq: 396 MHz 

ddr_mr1=0x00000004
Start write leveling calibration...
running Write level HW calibration
  MPWLHWERR register read out for factory diagnostics: 
  MPWLHWERR PHY0 = 0x00001e1e

Write leveling calibration completed, update the following registers in your initialization script
    MMDC_MPWLDECTRL0 ch0 (0x021b080c) = 0x00100018
Write DQS delay result:
   Write DQS0 delay: 24/256 CK
   Write DQS1 delay: 16/256 CK

Starting DQS gating calibration

[cornébos · Accepted solution]

Ok figured it out turned out my powersupply was browning out

[igorpadykov]

Hi cornébos

you are right, hanging at "Starting DQS gating calibration" usually happens

when ddr part is not working at all. While "write leveling calibration" may pass.

Best regards
igor

[cornébos]

After additional testing with MFG tools I have similare results.

The USB resets after the DRAM: message and then the MFG tool restarts the program after an error.

U-Boot 2020.04-5.4.47-2.2.0+gffc3fbe7e5 (Jan 23 2021 - 09:30:49 -0800)

CPU:   i.MX6ULL rev1.1 900 MHz (running at 396 MHz)
CPU:   Commercial temperature grade (0C to 95C) at 36C
Reset cause: POR
Model: i.MX6 ULL Board
Board: MX6ULL v2
DRAM:  512 MiB
▒

U-Boot 2020.04-5.4.47-2.2.0+gffc3fbe7e5 (Jan 23 2021 - 09:30:49 -0800)

CPU:   i.MX6ULL rev1.1 900 MHz (running at 396 MHz)
CPU:   Commercial temperature grade (0C to 95C) at 36C
Reset cause: POR
Model: i.MX6 ULL Board
Board: MX6ULL v2
DRAM:  512 MiB
▒

U-Boot 2020.04-5.4.47-2.2.0+gffc3fbe7e5 (Jan 23 2021 - 09:30:49 -0800)

CPU:   i.MX6ULL rev1.1 900 MHz (running at 396 MHz)
CPU:   Commercial temperature grade (0C to 95C) at 36C
Reset cause: POR
Model: i.MX6 ULL Board
Board: MX6ULL v2
DRAM:  512 MiB