Hi Eishi
one can recheck sd signals layout with sect.3.6.8 High speed signal routing recommendations
i.MX6 System Development User’s Guide :
For SD module interfaces:
– Match data and CMD trace lengths (length delta depends on bus rates)
– CLK should be longer than the longest signal in the Data/CMD group (+5 mils)
— Similar DDR rules must be followed for data, address and control as for SD module interfaces.
https://www.nxp.com/docs/en/user-guide/IMX6DQ6SDLHDG.pdf
also for reducing noise one can try to tweak drive strength of sd signals using IOMUXC_SW_PAD_CTL_PAD register
Best regards
igor
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