imx6ull RGB lcd display issue

[lukeli]

Dear sir:

         we are using imx6ull yocto platform for our project. we encounter a lcd display issue.

         we are using 480x320 RGB lcd. the display seems fine in uboot, but the not perfect in kernel. we have checked with LCD FAE,  our configuration are correct. we suspect it may related to platform. 

hardware connection:

         18 bit bus width which connect to LCD_DATA0--LCD_DATA17. enclosed hardware_connection.png in the attachment.

configuration in uboot, kernel:

uboot configuration:

struct display_info_t const displays[] = {{

        .bus = MX6UL_LCDIF1_BASE_ADDR,

        .addr = 0,

        .pixfmt = 18,

        .detect = NULL,

        .enable = do_enable_parallel_lcd,

        .mode   = { 

                .name                   = "EDC3507C21",

                .xres           = 320,

                .yres           = 480,

                .pixclock       = 108695,

                .left_margin    = 5,

                .right_margin   = 5,

                .upper_margin   = 2,

                .lower_margin   = 2,

                .hsync_len      = 5,

                .vsync_len      = 2,

                .sync           = 0,

                .vmode          = FB_VMODE_NONINTERLACED

} } };

kernel configuration:

&lcdif {

        pinctrl-names = "default";

        pinctrl-0 = <&pinctrl_lcdif_dat

                     &pinctrl_lcdif_ctrl

                     &pinctrl_lcdif_reset>;

        display = <&display0>;

        status = "okay";

        display0: display {

                bits-per-pixel = <32>;

                bus-width = <18>;

                display-timings {

                        native-mode = <&timing0>;

                        timing0: timing0 {

                        clock-frequency = <9200000>;

                        hactive = <320>;

                        vactive = <480>;

                        hfront-porch = <5>;

                        hback-porch = <5>;

                        hsync-len = <5>;

                        vback-porch = <2>;

                        vfront-porch = <2>;

                        vsync-len = <2>;

                        hsync-active = <0>;

                        vsync-active = <0>;

                        de-active = <1>;

                        pixelclk-active = <0>;

                        }; 

                }; 

        }; 

};

result :

 for uboot. enclosed uboot.bmp, lcd_uboot.jpg.  

  the picture uboot.bmp display well during uboot(lcd_uboot.jpg).

 for kernel. enclosed kernel.jpg, lcd_kernel.jpg.

 the picture kernel.jpg NOT display perfect during kernel(lcd_kernel.jpg).

 the horizontal line is correct, but the vertical line NOT display correct.

I also enclose the result about LCD UI display. ui.png is the frame buffer ,lcd_ui.png lcd_ui_zoom.jpg  are the lcd display result. you can see the display not well.

question:

 the same configuration works in uboot well, but not display well in kernel. 

can you give us any suggestion about why this issue happens?

[igorpadykov]

Hi luke

seems configuration which works in uboot well, is not exactly the same in kernel
as lcd clocks are different, so timings can be adjusted accordingly:
pixclock       = 108695 vs clock-frequency = <9200000>;

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[lukeli]

Dear igorpadykov:

         the clock configuration is original configuration for LCD8000-43T(LCD for EVK).

        in uboot, 

         "#define PS2KHZ(ps)      (1000000000UL / (ps))

         mxs_set_lcdclk(panel->isaBase, PS2KHZ(mode->pixclock));"

         the pixclock=108695 means the clock=1000000000UL/108685 KHZ= 9200KHZ=9200000HZ.

         in kernel,

         clock-frequency = <9200000>.

          the clock frequency in uboot/kernel are the same.

[igorpadykov]

Hi luke

for new lcd timings should be adjusted accordingly to its datasheet :

Display Output, Resolution and Timings (Linux) 

Best regards
igor

[lukeli]

Dear igorpadykov:

        I notice the pixclk active is not set correct. after I modify the pixelclk-active from 0 to 1. the bootup logo is better than before. but after bootup , the UI is not display correctly.  

       I also check the HSYNC,VSYNC,DE,PCLK. the signals are correct.

       is that any possible that /etc/X11/xorg.conf or other UI setting should be re-config if user change a new LCD?

&lcdif {

        pinctrl-names = "default";

        pinctrl-0 = <&pinctrl_lcdif_dat

                     &pinctrl_lcdif_ctrl

                     &pinctrl_lcdif_reset>;

        display = <&display0>;

        status = "okay";

        display0: display {

                bits-per-pixel = <32>;

                bus-width = <18>;

                display-timings {

                        native-mode = <&timing0>;

                        timing0: timing0 {

                        ......

                        hsync-active = <0>;

                        vsync-active = <0>;

                        de-active = <1>;

                        pixelclk-active = <1>;

                        }; 

                }; 

        }; 

};