Hi Ishii
>But other 1 and 3 connection of master device can not found.
it is the same as described in "9.1.1.1 DRAM Interface", since for interconnections
main NoC is used as central inter-connect fabric, which runs at 750MHz.
>Do you mind explaining this in more detail?
sorry this is internal design information, closed for customers. Please apply
to local NXP office to get more details.
Best regards
igor
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