Accessing imxqm lpspi2 in U-Boot-imx

[gmcn42]

Hi all,

we are currently trying to access (single-)SPI-NOR-flashes on our custom IMX8QM-board in U-Boot. The flash chips are connected to lpspi2 and can be accessed without any problems in Linux 6.1.22.

We're using u-boot-imx 2022.04 from the official BSP. We noticed the shipped IMX8QM *.dtsi files do not include a lpspi2-node unlike the Kernel DT.

We have tried adding one with some guesswork comparing other lpspi-nodes present in both the Kernel and U-Boot DTs. That resulted in the following additions/changes.

An extension of the pd_dma_lpspi2 node in fsl-imx8qm-device.dtsi:

pd_dma_lpspi2: PD_DMA_SPI_2 {
	reg = <SC_R_SPI_2>;
	#power-domain-cells = <0>;
	power-domains = <&pd_dma>;
	#address-cells = <1>;
	#size-cells = <0>;

	pd_dma0_chan4: PD_LPSPI2_RX {
		reg = <SC_R_DMA_0_CH4>;
		power-domains =<&pd_dma_lpspi2>;
		#power-domain-cells = <0>;
		#address-cells = <1>;
		#size-cells = <0>;

		pd_dma0_chan5: PD_LPSPI2_TX {
			reg = <SC_R_DMA_0_CH5>;
			power-domains =<&pd_dma0_chan4>;
			#power-domain-cells = <0>;
			#address-cells = <1>;
			#size-cells = <0>;
		};
	};
};

The addition of the lpspi2 node in the same file:

lpspi2: lpspi@5a020000 {
	compatible = "fsl,imx7ulp-spi";
	reg = <0x0 0x5a020000 0x0 0x10000>;
	interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
	interrupt-parent = <&gic>;
	clocks = <&clk IMX8QM_SPI2_CLK>,
		 <&clk IMX8QM_SPI2_IPG_CLK>;
	clock-names = "per", "ipg";
	assigned-clocks = <&clk IMX8QM_SPI2_CLK>;
	assigned-clock-rates = <60000000>;
	power-domains = <&pd_dma0_chan5>;
	dma-names = "tx","rx";
	dmas = <&edma0 5 0 0>, <&edma0 4 0 1>;
	status = "disabled";
};

And a reference to the node in our custom board dts:

&lpspi2 {
        #address-cells = <1>;
        #size-cells = <0>;
        num-cs = <2>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_lpspi2 &pinctrl_spi2_cs>;
	cs-gpios = <&gpio3 10 GPIO_ACTIVE_LOW>,
		<&gpio3 11 GPIO_ACTIVE_LOW>,
        status = "okay";

	spi-nor@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <2000000>;
		m25p,fast-read;
	};

	spi-nor@1 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		reg = <1>;
		spi-max-frequency = <2000000>;
		m25p,fast-read;
	};
};

  as well as a pinctrl definition (same as in Kernel):

pinctrl_lpspi2: lpspi2grp {
	fsl,pins = <
		SC_P_SPI2_SCK_DMA_SPI2_SCK              0x06000040
		SC_P_SPI2_SDO_DMA_SPI2_SDO              0x06000040
		SC_P_SPI2_SDI_DMA_SPI2_SDI              0x06000040
	>;
};

pinctrl_spi2_cs: spi2_csgrp {
	fsl,pins = <
		SC_P_SPI2_CS0_LSIO_GPIO3_IO10		0x21
		SC_P_SPI2_CS1_LSIO_GPIO3_IO11		0x21
	>;
};

We also set CONFIG_FSL_LPSPI=y in the U-Boot config. U-Boot now enumerates lpspi2 as SPI bus 1 (as checked using the dm command).

But if we try to sf probe 1:0 or 1:1, the command returns Invalid bus with error code 38 (ENOSYS). (Other non-existent busses give error 19.)

I am thinking that the may be one or more issues in the guesswork we did to set the power-domain/dma/interrupt values above.

Can anyone share some insight on this?

[gmcn42]

Hi,

not sure I understand your response correctly. There is a driver for lpspi ports in U-Boot-imx since last year. See https://github.com/nxp-imx/uboot-imx/blob/lf_v2022.04/drivers/spi/fsl_lpspi.c

As I wrote, we have activated the driver's Kconfig option (CONFIG_FSL_LPSPI=y) and the U-Boot 'dm' command reports that it has loaded that driver and has enumerated the device as SPI Bus 1. The error 38 happens when we're then trying to use the bus in any way. So my expectation would be that the error 38 originates somewhere from within the lpspi code, I just don't know where or why that happens.

I assumed that there would be some information available as to the correct configuration of the SPI busses because other lpspi-ports (lpspi0 and lpspi3) using the same driver are present in the official IMX8QM-DT integrated in u-boot-imx. See: https://github.com/nxp-imx/uboot-imx/blob/7376547b9e424b2d0f42dfe96394168c781ca297/arch/arm/dts/fsl-...

BR

[rtodaro]

I managed to get lpspi1 working in uboot following the same reasoning. The only thing that was missing was the clock definitions in drivers/clk/imx/clk-imx8qm.c. I was able to use drivers/clk/imx/clk-imx8qxm.c as a reference.

diff --git a/drivers/clk/imx/clk-imx8qm.c b/drivers/clk/imx/clk-imx8qm.c
index 848b8aff73..09e103847c 100644
--- a/drivers/clk/imx/clk-imx8qm.c
+++ b/drivers/clk/imx/clk-imx8qm.c
@@ -37,6 +37,10 @@ static struct imx8_clks imx8qm_clks[] = {
CLK_4( IMX8QM_HDMI_I2C0_DIV, "HDMI I2C0_DIV", SC_R_HDMI_I2C_0, SC_PM_CLK_MISC2 ),
CLK_4( IMX8QM_HDMI_IPG_CLK, "HDMI IPG_CLK", SC_R_HDMI, SC_PM_CLK_MISC ),
CLK_4( IMX8QM_HDMI_RX_I2C0_DIV, "HDMI RX I2C_DIV", SC_R_HDMI_RX_I2C_0, SC_PM_CLK_MISC2 ),
+ CLK_4( IMX8QM_SPI0_DIV, "SPI0_DIV", SC_R_SPI_0, SC_PM_CLK_PER ),
+ CLK_4( IMX8QM_SPI1_DIV, "SPI1_DIV", SC_R_SPI_1, SC_PM_CLK_PER ),
+ CLK_4( IMX8QM_SPI2_DIV, "SPI2_DIV", SC_R_SPI_2, SC_PM_CLK_PER ),
+ CLK_4( IMX8QM_SPI3_DIV, "SPI3_DIV", SC_R_SPI_3, SC_PM_CLK_PER ),
CLK_4( IMX8QM_UART0_DIV, "UART0_DIV", SC_R_UART_0, SC_PM_CLK_PER ),
CLK_4( IMX8QM_UART1_DIV, "UART1_DIV", SC_R_UART_1, SC_PM_CLK_PER ),
CLK_4( IMX8QM_UART2_DIV, "UART2_DIV", SC_R_UART_2, SC_PM_CLK_PER ),
@@ -132,6 +136,15 @@ static struct imx8_lpcg_clks imx8qm_lpcg_clks[] = {
CLK_5( IMX8QM_HDMI_RX_I2C_IPG_CLK, "HDMI_RX_I2C_IPG", 0, RX_HDMI_LPCG + 0x18, IMX8QM_HDMI_RX_I2C_IPG_S_CLK),
CLK_5( IMX8QM_HDMI_RX_I2C_IPG_S_CLK, "HDMI_I2C_IPG_S", 0, RX_HDMI_LPCG + 0x1c, IMX8QM_HDMI_RX_IPG_CLK ),

+ CLK_5( IMX8QM_SPI0_CLK, "SPI0_CLK", 0, LPSPI_0_LPCG, IMX8QM_SPI0_DIV ),
+ CLK_5( IMX8QM_SPI0_IPG_CLK, "SPI0_IPG", 16, LPSPI_0_LPCG, IMX8QM_IPG_DMA_CLK_ROOT ),
+ CLK_5( IMX8QM_SPI1_CLK, "SPI1_CLK", 0, LPSPI_1_LPCG, IMX8QM_SPI1_DIV ),
+ CLK_5( IMX8QM_SPI1_IPG_CLK, "SPI1_IPG", 16, LPSPI_1_LPCG, IMX8QM_IPG_DMA_CLK_ROOT ),
+ CLK_5( IMX8QM_SPI2_CLK, "SPI2_CLK", 0, LPSPI_2_LPCG, IMX8QM_SPI2_DIV ),
+ CLK_5( IMX8QM_SPI2_IPG_CLK, "SPI2_IPG", 16, LPSPI_2_LPCG, IMX8QM_IPG_DMA_CLK_ROOT ),
+ CLK_5( IMX8QM_SPI3_CLK, "SPI3_CLK", 0, LPSPI_3_LPCG, IMX8QM_SPI3_DIV ),
+ CLK_5( IMX8QM_SPI3_IPG_CLK, "SPI3_IPG", 16, LPSPI_3_LPCG, IMX8QM_IPG_DMA_CLK_ROOT ),
+
CLK_5( IMX8QM_UART0_CLK, "UART0_CLK", 0, LPUART_0_LPCG, IMX8QM_UART0_DIV ),
CLK_5( IMX8QM_UART0_IPG_CLK, "UART0_IPG", 16, LPUART_0_LPCG, IMX8QM_IPG_DMA_CLK_ROOT ),
CLK_5( IMX8QM_UART1_CLK, "UART1_CLK", 0, LPUART_1_LPCG, IMX8QM_UART1_DIV ),

[Bio_TICFSL]

Hello,

The error 38 means that there is no code of lpspi2 you need write and compile it.

Regards

[gmcn42]

Hi,

whoops, replied to the whole topic before I understood you can reply to individual messages.

TL;DR: Code is present as there is an official driver by NXP in u-boot-imx. Just not all  LPSPI-ports are present in the official device tree. The driver seems to generate the error somewhere, don't know why though. See my other answer for details.