ADV7535: No image output on display

[rkathar]

Hi Team,

We are working on DSI to HDMI converter (ADV7535) on our custom carrier board, which is based on Verdin Yavia IMX8M Plus. We have replaced ADV7535 instead of LT8912B MIPI DSI to HDMI bridge, which comes with Toradex carrier board.  We are using I2C channel 2 to communicate with the ADV7535 DSI to HDMI bridge, unlike the Yavia Carrier Board which uses a different I2C channel. As a result, we have made the following updates to the device tree to reflect this change:

 Device Tree Changes

1. verdin-imx8mp_dsi-to-hdmi_overlay.dts

• Removed the existing hdmi_lontium_lt8912 node.
• Added a new hdmi_adv7535 node under the I2C2 node.

2. imx8mp-verdin.dtsi

• Removed the hdmi_lontium_lt8912 node.
• Removed Lontium pin connection details from the hdmi_connector node.
• Added hdmi_adv7535 as a child node under I2C2.
  

 

 Observed Results After Changes

1. Successfully able to read/write internal registers of ADV7535.

   

   1. Able to dump I2C data:

      torizon@verdin-imx8mp-15404184:~$ i2cdump -y -f 1 0x39
      No size specified (using byte-data access)
           0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
      00: 14 00 00 00 00 00 00 00 00 00 41 0e bc 18 01 13    ?.........A?????
      10: 25 37 00 00 00 00 38 00 46 62 04 a8 00 00 1c 84    %7....8.Fb??..??
      20: 1c bf 04 a8 1e 70 02 1e 00 00 04 a8 08 12 1b ac    ?????p??..??????
      30: 00 00 00 00 00 00 00 00 00 00 00 80 00 00 00 b0    ...........?...?
      40: 00 50 f0 76 10 68 68 68 68 00 80 00 00 00 00 00    .P?v?hhhh.?.....
      50: 00 00 02 0d 6d 02 00 00 00 00 00 00 00 00 00 00    ..??m?..........
      60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
      70: 01 0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ??..............
      80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
      90: 00 00 00 00 c0 00 40 00 03 02 e0 18 30 61 00 00    ....?.@.????0a..
      a0: 00 00 a4 a4 08 04 00 00 00 00 00 40 00 00 40 14    ..????.....@..@?
      b0: 00 00 00 00 00 00 00 00 00 00 10 00 00 00 00 00    ..........?.....
      c0: 00 00 00 00 00 00 06 00 00 03 00 00 02 00 01 04    ......?..?..?.??
      d0: 0c ff 80 80 80 00 00 00 00 00 00 00 00 00 88 01    ?.???.........??
      e0: d0 70 01 00 00 00 fd 00 00 00 52 46 00 00 00 00    ?p?...?...RF....
      f0: 95 04 ff 00 00 00 00 00 00 00 7d aa 1c 00 b0 00    ??........}??.?.

      1. HDMI display is detected and EDID data is retrieved on the i.MX8MP. While HDMI-A -1 is DSI to HDMI and HDMI-A-2 is native HDMI port.
         

      root@verdin-imx8mp-15288064:/home/torizon# cat /sys/class/drm/card0-HDMI-A-1/edid | edid-decode
      edid-decode (hex):
       
      00 ff ff ff ff ff ff 00 30 ae 86 10 01 01 01 01
      22 15 01 03 80 29 1a 78 ee e5 b5 a3 55 49 99 27
      13 50 54 af ef 00 61 40 81 c0 81 80 81 8a 81 90
      95 00 95 0f 01 01 64 19 00 40 41 00 26 30 18 88
      36 00 a0 1d 00 00 00 18 00 00 00 fc 00 4c 45 4e
      20 4c 31 39 35 30 77 44 0a 20 00 00 00 fd 00 32
      4c 1e 51 0e 00 0a 20 20 20 20 20 20 00 00 00 ff
      00 42 33 34 33 32 38 34 35 0a 20 20 20 20 01 0b
       
      02 03 21 71 4e 06 07 02 03 15 96 11 12 13 04 14
      05 1f 90 23 09 07 07 83 01 00 00 65 03 0c 00 10
      00 8c 0a d0 90 20 40 31 20 0c 40 55 00 b9 88 21
      00 00 18 01 1d 80 18 71 1c 16 20 58 2c 25 00 b9
      88 21 00 00 9e 01 1d 80 d0 72 1c 16 20 10 2c 25
      80 b9 88 21 00 00 9e 01 1d 00 bc 52 d0 1e 20 b8
      28 55 40 b9 88 21 00 00 1e 02 3a 80 d0 72 38 2d
      40 10 2c 45 80 b9 88 21 00 00 1e 00 00 00 00 d0

       

       Issues Encountered

      1. No image output on the connected HDMI display.
      2. dmesg log error:

         imx_sec_dsim_drv 32e60000.mipi_dsi: failed to get pmsk for: fin = 12000, fout = 0
         

       

       Troubleshooting Attempt

      We attempted to modify the MIPI DSI controller clock settings in the device tree as follows:

      mipi_dsi: mipi_dsi@32e60000 {
      				#address-cells = <1>;
      				#size-cells = <0>;
      				compatible = "fsl,imx8mp-mipi-dsim";
      				reg = <0x32e60000 0x10000>;
      				clocks = <&media_blk_ctrl IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_DSI_PCLK>,
      					 <&media_blk_ctrl IMX8MP_CLK_MEDIA_BLK_CTRL_MIPI_DSI_CLKREF>;
      				clock-names = "cfg", "pll-ref";
      				assigned-clocks = <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
      				assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
      				assigned-clock-rates = <11000000>;
      				interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
      				power-domains = <&mipi_phy1_pd>;
      				status = "disabled";
      
      				port@0 {
      					dsim_from_lcdif: endpoint {
      						remote-endpoint = <&lcdif_to_dsim>;
      					};
      				};
      			};

      However, the default frequency still shows as 12 MHz in the dmesg logs.

      ---

       

       Request for Clarification

      We would appreciate your guidance on the following points:

      1. How can we correctly update the fin and fout values to resolve the pmsk error?
      2. Are there any additional device tree changes required to enable proper image output via ADV7535?

      Looking forward to your insights and suggestions.

      Please see attached dmesg log, device tree overlay into this thread.

      Thanks & Regards,
      Rupesh Kathar

      IMX8MPLUS #ADV7535 #DSI #HDMI #MIPI #I2C #I2S 

[joanxie]

it seems this error message is from your own driver, I didn't find this from nxp driver source code, and this settings isn't correct, you couldn't get any clock what you want, the clock parent is 24Mhz,  if you set 11Mhz, you only can get 24/2=12Mhz,

assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
				assigned-clock-rates = <11000000>;

 you can refer to the nxp source code for reference, check your settings about lcdif, mipi dsi and adv7535 are correct or not

linux-imx/arch/arm64/boot/dts/freescale/imx8mp-evk.dts at lf-6.12.y · nxp-imx/linux-imx · GitHub

linux-imx/arch/arm64/boot/dts/freescale/imx8mp.dtsi at lf-6.12.y · nxp-imx/linux-imx · GitHub

refer to the log, it seems the pll settings isn't correct, the pll driver is under

linux-imx/drivers/gpu/drm/imx/sec_mipi_pll_1432x.h at lf-6.12.y · nxp-imx/linux-imx · GitHub

you can double check it

[sgour]

Hi @joanxie ,

FYR, We are on a custom carrier board similar to Yavia carrier board of Toradex. Only change being the lontium DSI to HDMI adaptor being replaced with ADV7535. We went with ADV7535 as it is also used by NXP in some of its products. 

Therefore, we have done device tree modifications on top of Toradex's provided device trees for Yavia-wifi dts and its parent device tree sources. 

The device tree nodes is question are
1. Mipi-dsi  - Haven't modified anything here(changed back to default unlike previous post).  It must be used by other NXP devices as well.

2. The ADV7535 specific nodes and overlays, what we have provided in prev post.

The drivers are sec_mipi_dsim-imx.c , sec-dsim.c , adv7511_drv.c , adv7533.c .

Now, after tweaking the device tree overlay. We are not getting the fin, fout error anymore.

Here are the dev_dbg logs from the above drivers.

torizon@verdin-imx8mp-15404184:~$ dmesg | grep drm
[ 0.000000] Kernel command line: root=LABEL=otaroot rootfstype=ext4 quiet logo.nologo vt.global_cursor_defau lt=0 plymouth.ignore-serial-consoles splash fbcon=map:3 ostree=/ostree/boot.1/torizon/7b778d635701b4e0bbc49652c 421a587ae63ff3c6cbfc07d964084a23df7631d/0
[ 2.771129] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 2.771181] imx-drm display-subsystem: bound imx-lcdifv3-crtc.1 (ops lcdifv3_crtc_ops)
[ 2.772099] imx-drm display-subsystem: bound 32e60000.mipi_dsi (ops imx_sec_dsim_ops [sec_mipi_dsim_imx])
[ 2.772141] imx-drm display-subsystem: bound 32fd8000.hdmi (ops dw_hdmi_imx_ops)
[ 2.772468] [drm] Initialized imx-drm 1.0.0 20120507 for display-subsystem on minor 0
[ 2.869610] imx-drm display-subsystem: [drm] fb0: imx-drmdrmfb frame buffer device
[ 5.099098] systemd[1]: Starting Load Kernel Module drm...
[ 5.188031] systemd[1]: modprobe@drm.service: Deactivated successfully.
[ 5.188992] systemd[1]: Finished Load Kernel Module drm.
[ 5.262319] [drm] Initialized vivante 1.0.0 20170808 for 40000000.mix_gpu_ml on minor 1
torizon@verdin-imx8mp-15404184:~$ dmesg | grep dsim
[ 0.000000] Kernel command line: root=LABEL=otaroot rootfstype=ext4 quiet logo.nologo vt.global_cursor_defau lt=0 plymouth.ignore-serial-consoles splash fbcon=map:3 ostree=/ostree/boot.1/torizon/7b778d635701b4e0bbc49652c 421a587ae63ff3c6cbfc07d964084a23df7631d/0 dy
[ 2.759952] Kernel module loaded from ramdisk: sec_dsim - result: 0
[ 2.771246] imx_sec_dsim_drv 32e60000.mipi_dsi: sec-dsim bridge bind begin
[ 2.771290] imx_sec_dsim_drv 32e60000.mipi_dsi: version number is 0x1060200
[ 2.772085] imx_sec_dsim_drv 32e60000.mipi_dsi: sec-dsim bridge bind end
[ 2.772099] imx-drm display-subsystem: bound 32e60000.mipi_dsi (ops imx_sec_dsim_ops [sec_mipi_dsim_imx])
[ 2.916294] Kernel module loaded from ramdisk: sec_mipi_dsim_imx - result: 0
[ 3.259164] imx_sec_dsim_drv 32e60000.mipi_dsi: p: min = 1, max = 6, m: min = 88, max = 1023, s: min = 0, ma x = 5
[ 3.259252] imx_sec_dsim_drv 32e60000.mipi_dsi: fout = 390000, fin = 12000, m = 130, p = 1, s = 2, best_delt a = 0
[ 3.259262] imx_sec_dsim_drv 32e60000.mipi_dsi: no pre-exist hpar can be used
[ 18.521539] imx_sec_dsim_drv 32e60000.mipi_dsi: p: min = 1, max = 6, m: min = 88, max = 1023, s: min = 0, ma x = 5
[ 18.521629] imx_sec_dsim_drv 32e60000.mipi_dsi: fout = 390000, fin = 12000, m = 130, p = 1, s = 2, best_delt a = 0
[ 18.521640] imx_sec_dsim_drv 32e60000.mipi_dsi: no pre-exist hpar can be used
torizon@verdin-imx8mp-15404184:~$ dmesg | grep adv
[ 0.000000] Kernel command line: root=LABEL=otaroot rootfstype=ext4 quiet logo.nologo vt.global_cursor_default=0 plymouth.ignore-serial-consoles splash fbcon=map:3 ostree=/ostree/boot.1/torizon/7b778d635701b4e0bbc49652c421a587ae63ff3c6cbfc07d964084a23df7631d/0
[ 1.052362] adv7511 1-0039: Rev. 20
[ 4.325789] systemd[1]: System time before build time, advancing clock.
torizon@verdin-imx8mp-15404184:~$ 

With this, we are also able to generate a test colorbar pattern by setting the registers directly on ADV7535 using i2cset, implying ADV7535 to HDMI Sink display is working correctly. The problem lies in how iMX8MP is communicating with ADV7535.
We are still not getting any output on the display.

We would like to understand, is there any difference in how NXP have implemented ADV7535 in its products and how we are implementing it in terms of software as well as hardware approach. 

[joanxie]

I have already shared the imx8mp dts file before, firstly, you need set this bridge in the dts correctly, then the adv7535 driver is 

https://github.com/nxp-imx/linux-imx/blob/lf-6.12.y/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c

[sgour]

Hi @joanxie,

Thank you for guiding to the NXP kernel source.
We have made our device tree in-line with the imx8mp-evk.dts of NXP kernel 5.15y(not 6.12 that you've shared), and our displays working for certain resolutions, but not the resolution we are targeting i.e 1024x768.
We haven't made any other change, other than the device tree for adv7535. On Toradex kernel 5.15.2.x. 

Below is a table of what's working and what's not.

Resolution	Aspect Ratio	Standard	Common Refresh Rates	Realtek Display	Dell Monitor
640×480	4:3	Both	60 Hz	Working	Working
800×600	4:3	VESA	60–75 Hz	Working	Working
1024×768	4:3	VESA	60–75 Hz	Blank/ Flicker on Disable Internal timing generator	No output
1280×768	5:3	VESA	60 Hz	No output	No output
1280×720	16:9	Both	24/25/30/50/60 Hz	Working	Working
1366×768	16:9	VESA	60 Hz	No output	No output
1920×1080p	16:9	Both	24/25/30/50/60 Hz	Working	Working

What could be the possible reasons that only 1024x768 is not working? Other resolutions are working just by plugging HDMI as it should. 

[joanxie]

if you use 5.15, just change the branch to 5.15, since your source code is the third party company, I'm not sure how your driver is, but refer to the nxp adv7535 driver

linux-imx/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c at lf-5.15.y · nxp-imx/linux-imx · GitHub

not all of resolution can be supported, the valid clock are as below, if you need new clock, you must add there and add new clock in the clock driver

static const int valid_clocks[] = {

148500,

135000,

132000,

108000,

78750,

74250,

65000,

49500,

40000,

31500,

};