A Question on I2C Device in a Mixed I3C Bus

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

A Question on I2C Device in a Mixed I3C Bus

ソリューションへジャンプ
1,552件の閲覧回数
JC1985
Contributor I

Hi, NXP Experts,

Recently, we are investigating if NXP-RT600 MCU with I3C HDR support could meet our system requirement. We now have a following question, and hope get support from you.

In our system, there will be not only I3C devices but also I2C legacy devices which can work at 400Kbps or 1Mbps modes. As for legacy I2C protocol, multi-master feature is supported so that any of the I2C device can start a communication transaction when a bus is in an idle state. Is this still true for an I2C device working in a mixed I3C bus i.e. the I2C device (target in I3C specification term) can start a communication transaction when the mixed I3C bus is in Bus Availiable State? Will NXP-RT600 MCU support such a use senario?

Thanks and Regards!

// JC1985

0 件の賞賛
返信
1 解決策
1,507件の閲覧回数
Omar_Anguiano
NXP TechSupport
NXP TechSupport

I3C is compatible with I2C but with some limitations:
– Does not support clock stretching by other devices on the bus.
– Does not support multi-master systems I2C.
– Does not support extended addressing (10-bit).
– Supports standard mode, fast mode, and fast more plus, not high-speed mode.

Best regards,
Omar

元の投稿で解決策を見る

0 件の賞賛
返信
2 返答(返信)
1,508件の閲覧回数
Omar_Anguiano
NXP TechSupport
NXP TechSupport

I3C is compatible with I2C but with some limitations:
– Does not support clock stretching by other devices on the bus.
– Does not support multi-master systems I2C.
– Does not support extended addressing (10-bit).
– Supports standard mode, fast mode, and fast more plus, not high-speed mode.

Best regards,
Omar

0 件の賞賛
返信
1,460件の閲覧回数
JC1985
Contributor I
Thanks Omar for your help, it is very clear!
0 件の賞賛
返信