Zephyr + CAN on FRDM-MCXN947, Bitrate out of spec / Clocks

mwagner1

I'm currently in the process of evaluating a new SoC for a project. For this i have the FRDM-MCXN947 evalboard. This includes a CAN-FD port. Please be aware that I'm new to Zephyr / MCXN.

On evaluating the CAN IP, i was unable to communicate with other devices. On checking with the scope, i've found that the bitrate is way out of spec (118kBit / 125kBit, 943kBit / 1000kBit). This is with my test application and the zephyr example (west flash frdm_mcxn947/mcxn947/cpu0 zephyr/samples/drivers/can/babbling/) so I would assume some kind of clock setup problem.

I've found the (seemingly) relevant parts as part of the evaboard (board.c) and the devicetree nxp_mcxnx4x_common.dtsi

#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(flexcan0))
CLOCK_SetClkDiv(kCLOCK_DivFlexcan0Clk, 1U);
CLOCK_AttachClk(kFRO_HF_to_FLEXCAN0);
#endif

flexcan0: can@d4000 {
compatible = "nxp,flexcan";
reg = <0xd4000 0x4000>;
interrupts = <62 0>;
interrupt-names = "common";
clocks = <&syscon MCUX_FLEXCAN0_CLK>;
clk-source = <0>;
status = "disabled";
};

None of the labels seem to be part of the zephyr OS. Can you give me a hint how to set this up correctly ?

Thank you for your help!

Harry_Zhang

Hi @mwagner1

You can try to add frdm_mcxn947.overlay file

&flexcan0 {
    status = "okay";
    clock-frequency = <48000000>;
    bitrate = <125000>;
    sample-point = <875>;
    bus-speed-data = <1000000>;
    sample-point-data = <750>;
};

BR

Harry

mwagner1

this gives me compilation errors for the dt.

devicetree error: 'clock-frequency' appears in /soc/peripheral@50000000/can@d4000 in /home/user/project/build/zephyr/zephyr.dts.pre, but is not declared in 'properties:' in /home/user/project/zephyr/dts/bindings/can/nxp,flexcan.yaml

the following compiles, but the bitrate is still wrong.

&flexcan0 {
status = "okay";
// clock-frequency = <48000000>;
bitrate = <125000>;
sample-point = <875>;
// bus-speed-data = <1000000>;
// sample-point-data = <750>;
};

Harry_Zhang

Hi @mwagner1

I have confirmed with the internal team. this bitrate accuracy issue is caused by the clock source. The file frdm_mcxn947/board.c configures the clocks for the board, and is clocking from the internal FRO. It is expected that applications and custom boards will customize this board.c file as needed, see Clock Configuration in Zephyr .

There is also an open pull request enabling CAN FD support for this board at https://github.com/zephyrproject-rtos/zephyr/pull/98900 , and that PR is modifying board.c to clock from PLL0 instead to achieve the required accuracy.

You can refer to it.

BR

Harry

mwagner1

thanks, this fixes the problem for me.

#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(flexcan0))
CLOCK_SetClkDiv(kCLOCK_DivFlexcan0Clk, 3U);
CLOCK_AttachClk(kPLL0_to_FLEXCAN0);
#endif

Harry_Zhang

Hi @mwagner1

I'm sorry, I can reproduce this issue. I think it's a clock issue.

I need to discuss it with the internal team and I will inform you promptly if there is any news.

BR

Harry