Hello Lukasz,
To enable the TX/RX switch pins, you need to configure the mux of the pins, the timing registers for the TX/RX switch signals and enable the RX/TX_SWITCH on the FAD_CTRL register.
You can use the following code as reference. Include fsl_port.h and Phy.h.
PORT_SetPinMux(PORTC,2u,kPORT_MuxAlt2);
PORT_SetPinMux(PORTC,3u,kPORT_MuxAlt2);
XCVR_TSM->TIMING49 = 0xFFFFFF01;
XCVR_TSM->TIMING50 = 0xFF01FFFF;
PhyPlmeSetANTPadStateRequest(FALSE, TRUE);
Regards,
Gerardo