Hi Mehmet,
You would need to define these based on your custom hardware. You would need to modify IOMUXC_MemMap and add new macros, based on IOMUXC_SCI_FLX1-3 macros. Keep in mind the IOMUXC_MemMap struct ordering - you will want to ensure the register offsets you define match your hardware.
Also, you should add cases for UART4-5 in the _bsp_serial_io_init function, found in the init_gpio.c in your BSP source. For the Vybrid Tower, this is found at mqx/source/bsp/twrvf65gs10_a5/init_gpio.c.
Thanks,
Timesys Support