How to define UART 4 and UART 5 for MQX

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How to define UART 4 and UART 5 for MQX

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MehmetAliIpin
Contributor V

Dear community,

When I want to use UART5 of Vybrid VF3, I could not see its definitions

  • SCI_FLX5_IPP_IND_SCI_TX_SELECT_INPUT
  • IOMUXC_SCI_FLX5_IPP_IND_SCI_TX_SELECT_INPUT

in MVF50GS10Mk50.h, like UART1, UART2, and UART3.

How should we define it?

Best regards.

Mehmet Ali Ipin

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timesyssupport
Senior Contributor II

Hi Mehmet,

You would need to define these based on your custom hardware. You would need to modify IOMUXC_MemMap and add new macros, based on IOMUXC_SCI_FLX1-3 macros. Keep in mind the IOMUXC_MemMap struct ordering - you will want to ensure the register offsets you define match your hardware.

Also, you should add cases for UART4-5 in the _bsp_serial_io_init function, found in the init_gpio.c in your BSP source. For the Vybrid Tower, this is found at mqx/source/bsp/twrvf65gs10_a5/init_gpio.c.

Thanks,

Timesys Support

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karina_valencia
NXP Apps Support
NXP Apps Support

timesyssupport can you attend this case?

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