T2080RDB DDR Timing Parameters

[asnovice_ad]

Hello, I am looking to run wolfBoot on my T2080RDB-PC board. To do so, I need to configure the DDR timing information for my board. I tried looking for it online, but I cannot find datasheets for my RAM chip UDIMM D3XP56082XL10AA.

These are the configurations that I am looking for, any guidance for how I can retrieve these values would be greatly appreciated.

https://github.com/wolfSSL/wolfBoot/blob/084431ba87d713cafe926cfe0a9edbe12e3b5270/hal/nxp_t2080.h#L2...

#define DDR_N_RANKS 2 /* TODO: confirm from CS_CONFIG dump */
#define DDR_RANK_DENS 0x100000000 /* TODO: confirm */
#define DDR_SDRAM_WIDTH 64
#define DDR_EC_SDRAM_W 8
#define DDR_N_ROW_ADDR 16 /* TODO: confirm */
#define DDR_N_COL_ADDR 10 /* TODO: confirm */
#define DDR_N_BANKS 8
#define DDR_EDC_CONFIG 2
#define DDR_BURSTL_MASK 0x0c
#define DDR_TCKMIN_X_PS 1500 /* TODO: from DDR3L datasheet */
#define DDR_TCMMAX_PS 3000 /* TODO: from DDR3L datasheet */
#define DDR_CASLAT_X 0x000007E0 /* TODO */
#define DDR_TAA_PS 13500 /* TODO */
#define DDR_TRCD_PS 13500 /* TODO */
#define DDR_TRP_PS 13500 /* TODO */
#define DDR_TRAS_PS 36000 /* TODO */
#define DDR_TRC_PS 49500 /* TODO */
#define DDR_TFAW_PS 30000 /* TODO */
#define DDR_TWR_PS 15000 /* TODO */
#define DDR_TRFC_PS 260000 /* TODO */
#define DDR_TRRD_PS 6000 /* TODO */
#define DDR_TWTR_PS 7500 /* TODO */
#define DDR_TRTP_PS 7500 /* TODO */
#define DDR_REF_RATE_PS 7800000 /* TODO */

#define DDR_CS0_BNDS_VAL 0x00000000 /* TODO: from dump */
#define DDR_CS1_BNDS_VAL 0x00000000 /* TODO: from dump */
#define DDR_CS2_BNDS_VAL 0x00000000 /* TODO: from dump */
#define DDR_CS3_BNDS_VAL 0x00000000 /* TODO: from dump */
#define DDR_CS0_CONFIG_VAL 0x00000000 /* TODO: from dump */
#define DDR_CS1_CONFIG_VAL 0x00000000 /* TODO: from dump */
#define DDR_CS2_CONFIG_VAL 0x00000000 /* TODO: from dump */
#define DDR_CS3_CONFIG_VAL 0x00000000 /* TODO: from dump */
#define DDR_CS_CONFIG_2_VAL 0x00000000 /* TODO: from dump */

#define DDR_TIMING_CFG_3_VAL 0x00000000 /* TODO: from dump */
#define DDR_TIMING_CFG_0_VAL 0x00000000 /* TODO: from dump */
#define DDR_TIMING_CFG_1_VAL 0x00000000 /* TODO: from dump */
#define DDR_TIMING_CFG_2_VAL 0x00000000 /* TODO: from dump */
#define DDR_TIMING_CFG_4_VAL 0x00000000 /* TODO: from dump */
#define DDR_TIMING_CFG_5_VAL 0x00000000 /* TODO: from dump */

#define DDR_SDRAM_MODE_VAL 0x00000000 /* TODO: from dump */
#define DDR_SDRAM_MODE_2_VAL 0x00000000 /* TODO: from dump */
#define DDR_SDRAM_MODE_3_8_VAL 0x00000000 /* TODO: from dump */
#define DDR_SDRAM_MD_CNTL_VAL 0x00000000 /* TODO: from dump */

#define DDR_SDRAM_CFG_VAL 0x00000000 /* TODO: from dump */
#define DDR_SDRAM_CFG_2_VAL 0x00000000 /* TODO: from dump */

#define DDR_SDRAM_INTERVAL_VAL 0x00000000 /* TODO: from dump */
#define DDR_DATA_INIT_VAL 0xDEADBEEF
#define DDR_SDRAM_CLK_CNTL_VAL 0x00000000 /* TODO: from dump */
#define DDR_ZQ_CNTL_VAL 0x00000000 /* TODO: from dump */

/* Write leveling - CRITICAL: board-specific values from U-Boot.
* These depend on PCB trace lengths and MUST come from the register dump. */
#define DDR_WRLVL_CNTL_VAL 0x00000000 /* TODO: from dump */
#define DDR_WRLVL_CNTL_2_VAL 0x00000000 /* TODO: from dump */
#define DDR_WRLVL_CNTL_3_VAL 0x00000000 /* TODO: from dump */

#define DDR_SDRAM_RCW_1_VAL 0x00000000 /* TODO: from dump */
#define DDR_SDRAM_RCW_2_VAL 0x00000000 /* TODO: from dump */

#define DDR_DDRCDR_1_VAL 0x00000000 /* TODO: from dump */
#define DDR_DDRCDR_2_VAL 0x00000000 /* TODO: from dump */

[yipingwang]

If you change to use other DDR DIMM on T2080RDB(not using the original DDR DIMM), you need to use QCVS DDRv tool to do optimization and validation to get the optimized parameters and use them in u-boot source code.

Please refer to the following document.

https://community.nxp.com/t5/Qonverge-Knowledge-Base/DDR-Controller-Configuration-on-LS2085-LS2080-B...

[asnovice_ad · Accepted solution]

Understood, in my case I am using the original DDR DIMM that came with the board. I was able to extract the configurations I needed from the I2C dump file. Thanks!