How to enable I2C clock stretching setting for SE052F

[StevenGGL]

Hello to everyone.

Some SE052 OS configurations are listed in the SE052 datasheet. It said I2C can run at 3.4MHz if the clock stretching is enabled. 

I tried to use the se05x_Personalization demo app from the se05x middleware package to enable I2C clock stretching for SE052. However, it failed at GP_Select(). The returned APDU code is 0x6A82.

Here are the compile-time configuration I am using:

-DPTMW_SMCOM=T1oI2C
-DPTMW_Host=iMXLinux
-DPTMW_HostCrypto=OPENSSL
-DPTMW_SE05X_Auth=PlatfSCP03
-DPTMW_SCP=SCP03_SSS
-DPTMW_OpenSSL=3_0
-DPTMW_Applet=SE05X_C
-DPTMW_SE05X_Ver=07_02

Some questions:

1. Does the SE052F support using the se05x_Personalization demo app?
2. If it's supported, is there any configuration I missed?
3. Are there any reference documents or additional resources that could provide guidance?

@Kan_Li Thanks

[Kan_Li]

Hi @StevenGGL ,

It needs PERSO applet support, but SE052F doesn't have it. Please try the demo with SE051 instead.

Have a great day,
Kan

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[StevenGGL]

Hi @Kan_Li 

Thanks for your reply.

Is it possible to communicate with the SE052F at 3.4M bit/s, or close to that speed, without enabling the clock stretching? 

Our distributor suggested trying to reach 3.4M bit/s without clock stretching enabled, as SE052F uses DMA internally for I2C communication. I tried to test that with the NXP Linux driver and SE05X middleware package, but the communication can not be established at baud rate higher than 1M bit/s. I also experimented with the I2C pin configuration, using both push-pull and open drain settings. It doesn't help. For reference, Our I2C pins have two 2.2K pull-up resisters. I'm wondering if there is any missing configuration that would allow this to work.

Thank you.

[Kan_Li]

Hi @StevenGGL ,

Actually 3.4M bit/s is a speed supported by I2C HS mode, in which the host controller would send a HS preamble in front of the standard I2C frame, to put the I2C target, here for SE052F, into HS mode as well. If your controller could not support this mode, 3.4M bit/s would be hard to achieve, but still possible for a higher speed than 1M bits/s depending on your host controller, I have tested with RT1170 to have a SCL signal at about 1.5 MHz. 

Have a great day,
Kan

-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!
- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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[StevenGGL · Accepted solution]

Hi @Kan_Li 

We found that we made a mistake in hardware design. SE052F can run at 3.4MHz. Thanks for your help.

Best regards,

Steven