Our customer has a question pertaining to the implementation of SM_070 (section 5.6.12.1) for the S32K148:
"Recommendation: For checking the content of safety relevant configuration registers a CRC check as described below can be used. If the CRC method to check configuration register is not feasible, an alternative register check can be implemented, like read configuration registers and check against expected value."
In each module there are many configuration registers that are not contiguous. In addition, many configuration registers are mixed up with status registers, meaning that for almost all configuration registers, some status bits would need to be removed from the register to be capable of calculating the configuration CRC.
Questions:
Since the configuration registers are not always contiguous and are often mixed with status registers, how is it possible to be effective with the CRC module (for example FTM and ADC)? Is there a different approach that should be taken?
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Hi Norm,
you are right CRC only makes sense for bigger block of memory and this safety measure is not really realistic in practice.
I would recommend:
- a Read after write for SR configuration register
- detect the resulting effect of the incorrect configuration register. In general if a configuration register changes the effect can be monitored by a SPF or latent fault check. For example, if the clock config register changes, the CMU would detects it. If FCCU register fails, this is a latent fault and it would be detected at next configuration (read after write) for permanent fault, or be cleared at next configuration.
Hi Norm,
you are right CRC only makes sense for bigger block of memory and this safety measure is not really realistic in practice.
I would recommend:
- a Read after write for SR configuration register
- detect the resulting effect of the incorrect configuration register. In general if a configuration register changes the effect can be monitored by a SPF or latent fault check. For example, if the clock config register changes, the CMU would detects it. If FCCU register fails, this is a latent fault and it would be detected at next configuration (read after write) for permanent fault, or be cleared at next configuration.