Abstract
This example presents an use case for analogue data capturing using eMIOS, BCTU, ADC and DMA modules on S32M27x and S32K3 series based on the RTD low level API to support diverse application needs.
Connections:
S32M27XEVB-C064 / S32K31XEVB-Q100 -> Pin -> Signal -> Label
- J60-1 /J40-12 -> PTE16 -> siul2_gpio_144 -> GPIO1 (GPT)
- J21-1 / J38-6 -> PTD16 -> emios_0_ch_1_g -> PWM1
- J21-2 / J40-16 -> PTD15 -> siul2_gpio_111 -> GPIO2 (PWM Trigger)
- J21-3 / J39-1 -> PTB5 -> siul2_gpio_37 -> GPIO3 (BTCU Trigger)
- J60-4 / J38-3 -> PTD0 -> siul2_gpio_96 -> GPIO4 (BTCU Watermark)
Potentiometer in S32M27XEVB-C064
- J19-2 -> PTE6 -> adc1_p6 -> POT
Potentiometer in S32K31XEVB-Q100
- J38-11 -> PTA15 -> adc1_p7 -> POT
Note: For S32M27XEVB-C064, consider remove following resistors: R208, R169, R168, R209 and R181.
Note: Following line should be added in project/generate/src/Bctu_Ip_PBcfg.c every time the code is updated in Config Tools:
#define DMA_LOGIC_CH_0 ((uint8)0U)
Detailed Description:
Clock Divider Value from MCL eMIOS_1, along with Compare Value from GPT eMIOS_1_ch_0 generates a time-out period. Once time-out is reached its Emios Notification toggles GPIO1. This allows us to observe in scope 2 events, which mark the start and the end of the signal sequence.
The eMIOS_0_ch_23 channel is configured as global counter bus A. In this setup, it can act as the time base for other eMIOS_0 channels, enabling synchronization between other channels—there is just one PWM in this case. This synchronization ensures that channels share the same time base, thereby defining a common period for their operation.
The emios_0_ch_1_g channel is configured as OPWMT mode, which offer more flexibility for triggering. An interrupt is requested on every flag event, during which GPIO2 is toggled—happens at half the time high in this case. This flag event, can be configured using Trigger parameter. For more details about eMIOS supported features please refer to S32M27x/S32K3 – eMIOS Usage.
The BCTU implements a list for parallel conversions using ADC0 and ADC1. Which is triggered by the eMIOS channel, and the resulting data is stored in FIFO1, as follows:
- ADC0: VREFH_ChanNum55 -> BANDGAP_ChanNum48
- ADC1: VREFL_ChanNum54 -> P7_ChanNum7 (POT)
For debugging purposed the GPIO3 is toggled every BCTU Trigger Notification. Additionally, the GPIO4 is toggled in BCTU Watermark Notification, which happens every time the number of active entries in FIFO exceeds the watermark level, and therefore the data is available for reading.
See full signal sequence in Figure 1:
Figure 1. Signals of example project
When you suspend debug session, in Expressions tab (Figure 2) you can observe results: g_fifo1Result, which corresponds to the BCTU list measurements, meanwhile g_fifo1Volts corresponds to the conversion in volts.
Figure 2. Expressions tab of example project
References
- S32 Design Studio for S32 Platform
- Real-Time Drivers (RTD)
- S32M2xx Data Sheet [S32M2xx_DS]
- S32M27x Reference Manual [S32M27XRM]
- S32M27x PMSM/BLDC Motor Control Evaluation Board [S32M27XEVB]
- S32K3xx MCU Family Data Sheet [S32K3xx]
- S32K3xx MCU Family - Reference Manual [S32K3XXRM]
- S32K31XEVB-Q100 Evaluation Board for Automotive General Purpose [S32K31XEVB-Q100]
- S32M27x/S32K3 – eMIOS Usage [S32M Knowledge Base]
Application Software:
- S32M276_RTD600_eMIOS_BCTU_ADC_DMA_Ip_example
- S32K311_RTD600_eMIOS_BCTU_ADC_DMA_Ip_example
Examples were built and tested using the following IDE and Driver versions:
- S32 Design Studio for S32 Platform Version 3.6.3
- S32K3_S32M27x Real-Time Drivers ASR R21-11 Version 6.0.0
