s32k142 LPUART0 singleWire mode cannot send data

[sssPPP]

I am using LPUART0 in multiplexed UART mode, with an external 10K resistor pulling up to 3.3V. After configuring it as a single-wire UART, I am unable to send data. Please help me troubleshoot this issue.

void LPUART0_init(void)

{

    PCC->PCCn[PCC_LPUART0_INDEX] &= ~PCC_PCCn_CGC_MASK;

    PCC->PCCn[PCC_LPUART0_INDEX] |= PCC_PCCn_PCS(0b010) | PCC_PCCn_CGC_MASK;

    LPUART0->BAUD = LPUART_BAUD_OSR(15) | LPUART_BAUD_SBR(52);

    uint32_t ctrl_value = 0;

    ctrl_value |= LPUART_CTRL_LOOPS_MASK;   // LOOPS = 1

    ctrl_value |= LPUART_CTRL_RSRC_MASK;    // Rsrc=1

    ctrl_value |= LPUART_CTRL_TE_MASK;      // TE = 1

    ctrl_value |= LPUART_CTRL_RE_MASK;      // RE = 1

    ctrl_value |= LPUART_CTRL_RIE_MASK;     // RIE = 1（如需要）

LPUART0->CTRL = ctrl_value;  // 一次性赋值

}

PB1配置为：

PORTB->PCR[1] = PORT_PCR_MUX(2);

发送时，先将TXDIR置位，发送完成再复位：

LPUART0->CTRL |= LPUART_CTRL_TXDIR_MASK;

发送数据

LPUART0->CTRL &= ~LPUART_CTRL_TXDIR_MASK;

[db16122]

Capture the I2C bus waveform and modify the pull up resistor to 4.7K may helps as well

[VaneB]

Hi @sssPPP 

According to the code you shared, the configuration of the LOOPS and RSRC bits is correct:

LPUART0->CTRL |= LPUART_CTRL_LOOPS_MASK; /* Enable loop/single-wire mode */
LPUART0->CTRL |= LPUART_CTRL_RSRC_MASK; /* Select single-wire mode */

However, before modifying these bits, it is important to ensure that both the transmitter and receiver are disabled:

LPUART0->CTRL &= ~(LPUART_CTRL_TE_MASK | LPUART_CTRL_RE_MASK);

Then, before starting the transmission, you should set the direction to transmit and enable the transmitter:

LPUART0->CTRL |= LPUART_CTRL_TXDIR_MASK; /* Set transmit direction */
LPUART0->CTRL |= LPUART_CTRL_TE_MASK; /* Enable transmitter */

Finally, after writing data to the DATA register, ensure that you wait for the Transmission Complete flag (TC), not only the Transmit Data Register Empty flag (TDRE), before switching the pin back to receive mode. This to prevent the LPUART from releasing the single-wire line before the byte has been fully transmitted.

This has also been discussed in the thread S32K344 Single Wire UART mode, where the correct timing of the TXDIR signal is critical to ensure proper transmission.

BR, VaneB