internal clock deviation

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internal clock deviation

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yangaichimantou
Contributor I

Hi,

We need S32K to calculate high precision time.

We want to know, if we use external crystal of 16M and frequency tolerance of 1 ppm.

S32K internal clock double 10x frequency by PLL.

Then the internal time deviation may be 10 times of the external crystal deviation?

Or do we have other experiment data or calculate method?

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Senlent
NXP TechSupport
NXP TechSupport

Hi@yangaichimantou

yes ,you can calculate it like this, but it's not entirely accurate.

because the PLL has a filtering effect on the input source jitter, there is inherent PLL jitter on the generated output,so a completely accurate calculation is not easy to quantify.

BR!

 

 

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1,038件の閲覧回数
Senlent
NXP TechSupport
NXP TechSupport

Hi@yangaichimantou

yes ,you can calculate it like this, but it's not entirely accurate.

because the PLL has a filtering effect on the input source jitter, there is inherent PLL jitter on the generated output,so a completely accurate calculation is not easy to quantify.

BR!

 

 

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