S32K1 devices do not support a hardware SRAM scrubbing mechanism that would automatically write corrected data back to memory after a correctable ECC event. A software-based implementation is also not feasible, as single-bit SRAM ECC correction events are not reported by the ERM, so the application cannot identify the affected memory location.
While the S32K3 family also does not provide automatic SRAM scrubbing, it does report single-bit ECC events, which gives the application visibility into these errors and enables implementation of more advanced fault-handling strategies.