S32K388 eMIOS init ended in BUSFAULT

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S32K388 eMIOS init ended in BUSFAULT

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OndrejK
Contributor II

Hi team,

Me and my colleagues working on new design of our main products and we choose S32K344  and S32K388 MCU.
Now we are playing with ICU (IPWM) and OCU (OPWM) EMIOS  functionality and testing this on S32K344 (PVEV board) and S32K388 EVB board) MCU. I pickup example projects from RTD 6.0.0 D2506 version  S32DS 3.6.3 and these working  fine with clock domain set us running from FIRC (48 MHz).
But when I change clock domain to  external OSC (16MHz) ,PLL  chain and EMIOS is clocking from CORE_CLK (120 or 160 MHz) first try to write EMIOS MCR register ended with BUSFAULT escalate to HARDFAULT.
Seems for me that some initialization missing but I haven't idea what. Funny is that example for using EMIOS PWM output mode works for me well for both clock domain settings (FIRC and external OSC) Have somebody any tips, idea what I need to do in project?

Here is my projects for review:

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226件の閲覧回数
OndrejK
Contributor II

Hi Leo 

I found out issue here:
is needed just change Clock_Ip_Init(&Clock_Ip_aClockConfig[0]) function instead Clock_Ip_InitClock(&Clock_Ip_aClockConfig[0]) used on example which is "sub function of previous one.

OndrejK_0-1755594474234.png

 

 

Now is working for  and  you can mark this as SOLVED
Thank you for your interest 

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_Leo_
NXP TechSupport
NXP TechSupport

Thank you for your interest in our products and for contributing to our community.

Please refer to the following community post:

S32M27x/S32K3 – eMIOS Usage -> 
https://community.nxp.com/t5/S32M-Knowledge-Base/S32M27x-S32K3-eMIOS-Usage/ta-p/2129760

Examples are clocked in the following way:

_Leo__0-1755544381159.png

I hope this information is helpful.

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OndrejK
Contributor II

Hi Leo,
 

I trying this project again and setup clock follow your screenshot but still is there HARDFAULT.
One question: you r screenshot is from what environment-versions? MCU, S32DS.RTD? Because main looks different:

OndrejK_0-1755590216387.png

and you can see that EMIOS IP is driving from CORE_CLK.
I try to add  Emios_Mcl_Ip_Init function (I not sure if  that really missing) to my main.c:

OndrejK_1-1755590389947.png

and here is exact place where code first time try access EMIOS-MCR register and step over this cause HARDFAULT immediately:

OndrejK_2-1755590580761.png

 

Please can you try  my projects on your side?
I again attaching original example which works on FIRC clocks(original_example.zip) and adjusted project(adjusted.zip) witch is switched  to ExtOSC 16MHz on my S32K388EVB-Q289 board

 

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OndrejK
Contributor II

Hi Leo 

I found out issue here:
is needed just change Clock_Ip_Init(&Clock_Ip_aClockConfig[0]) function instead Clock_Ip_InitClock(&Clock_Ip_aClockConfig[0]) used on example which is "sub function of previous one.

OndrejK_0-1755594474234.png

 

 

Now is working for  and  you can mark this as SOLVED
Thank you for your interest 

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