Hello
I saw the following description in the chip manual:
[ECC with single bit correction, double bit detection (all 1s valid) with 64-bit granularity]
But when I used S32K344 for actual testing, I found that:
1.If the same Byte (8-bit) is written repeatedly, an error interrupt will be triggered when reading the address;
2.But when different bytes within 8Byte (64-bit') are written repeatedly, for example, 0x00FFFFFFFFFFFFFF is written for the first time and 0x0000FFFFFFFFFFFF for the second time, an error interrupt will not be triggered when reading.
What is the reason why repeated writing within an ECC segment will not cause an error?
BestRegards,
Simon
Solved! Go to Solution.
Hi @Simon-Liu,
If the 64bit double word is programmed, its ECC check sum is calculated and flashed along with the double word. That mean that the bits of the check sum change from 1 to 0.
The controller can then correct single-bit errors and detect double-bit errors in the record. But it cannot reliably detect 3-bit errors etc.
If the double word is reprogrammed (other bits change from 1 to 0 in the record), again its check sum is calculated and flashed (other bits of the checksum may change from 1 to 0)
So, the resulting double word record is:
1st record AND 2nd record.
The resulting ECC checksum is:
1st check sum AND 2nd check sum.
If could be that the 8bit resulting checksum matches the resulting record accidently.
Or this 8bit error that you inject if evaluated as a single-bit error, and the result get corrected.
Regards,
Daniel
Hi @Simon-Liu,
There is just 8bit (256) check sum for each 64 bits of flash.
It can correct single bit errors and detect double-bit errors.
Regards,
Daniel
Hello, @danielmartynek
I know that every 64 bits of flash data has an 8-bit (256) checksum.
Maybe I didn't describe it clearly or didn't understand how the checksum is calculated.
My question is this:
If every 64 bits of flash data has an 8-bit (256) checksum, then programming the 64-bit flash multiple times will cause ECC errors, right?
As I described above, I programmed the 64-bit flash multiple times in two different ways, but one case triggered an ECC error and the other case did not trigger an ECC error. What is the reason?
Is it the following reason?
ECC checks the entire 64-bit data block. If different bytes are written each time and the flash write rules are not violated (for example, no attempt to change '0' back to '1'), ECC will not detect an error.
BestRegards,
Simon
Hi @Simon-Liu,
The exact code used there is not disclosed.
According to the specification, it can correct 1-bit error and detect 2-bit errors.
In your example, you inject an 8-bit error.
http://www.mathaddict.net/hamming.htm
https://en.wikipedia.org/wiki/Hamming_code
Regards,
Daniel
Hello, @danielmartynek
I used two methods to inject 8-bit errors, but only one method triggered the ECC error interrupt. Do you know why?
BestRegards,
Simon
Hi @Simon-Liu,
If the 64bit double word is programmed, its ECC check sum is calculated and flashed along with the double word. That mean that the bits of the check sum change from 1 to 0.
The controller can then correct single-bit errors and detect double-bit errors in the record. But it cannot reliably detect 3-bit errors etc.
If the double word is reprogrammed (other bits change from 1 to 0 in the record), again its check sum is calculated and flashed (other bits of the checksum may change from 1 to 0)
So, the resulting double word record is:
1st record AND 2nd record.
The resulting ECC checksum is:
1st check sum AND 2nd check sum.
If could be that the 8bit resulting checksum matches the resulting record accidently.
Or this 8bit error that you inject if evaluated as a single-bit error, and the result get corrected.
Regards,
Daniel
Hi, @danielmartynek
Thank you for your answer, I understand. That is to say, each time you program the 64-bit, a new 8-bit ECC check code will be generated. If the check code generated by programming again is the same as the previous check code or does not change from 0 to 1, no error will occur.
BestRegards,
Simon